Blu-ray vs HD-DVD war over?  As you know, there are two different, competing formats for the next generation DVD. NEC just announced they will ship a dual-format chip capable of playing discs in either format! I’ve been saying for years: Can’t we all just get along? Computer Organization and Design Lecture 13 – Synchronous Digital Systems

Review C program: foo.c Assembly program: foo.s Executable(mach lang pgm): a.out Compiler Assembler Linker Loader Memory Object(mach lang module): foo.o lib.o

COD What are “Comp. Organ. and Design”? Coordination of many levels of abstraction I/O systemProcessor Compiler Operating System (MacOS X) Application (Netscape) Digital Design Circuit Design Instruction Set Architecture Datapath & Control transistors Memory Hardware Software Assembler ISA is an important abstraction level: contract between HW & SW

Below the Program High-level language program (in C) swap int v[], int k){ int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } Assembly language program (for MIPS) swap: sll$2, $5, 2 add$2, $4,$2 lw$15, 0($2) lw$16, 4($2) sw$16, 0($2) sw$15, 4($2) jr$31 Machine (object) code (for MIPS) C compilerassembler ?

Synchronous Digital Systems Synchronous: Means all operations are coordinated by a central clock.  It keeps the “heartbeat” of the system! Digital: Mean all values are represented by discrete values Electrical signals are treated as 1’s and 0’s and grouped together to form words. The hardware of a processor, such as the MIPS, is an example of a Synchronous Digital System

Logic Design Next 6 weeks: we’ll study how a modern processor is built; starting with basic elements as building blocks. Why study hardware design? Understand capabilities and limitations of hardware in general and processors in particular. What processors can do fast and what they can’t do fast (avoid slow things if you want your code to run fast!) Background for more detailed self-learning There is just so much you can do with processors. At some point you may need to design your own custom hardware.

PowerPC Die Photograph Let’s look closer…

Pentium Die Photograph

Processor Chip Connections

Transistors 101 MOSFET （金属氧化物场效应管） Metal-Oxide-Semiconductor Field-Effect Transistor Come in two types:  n-type NMOSFET  p-type PMOSFET For n-type (p-type opposite) If current is NOT flowing in Gate, transistor turns “off” (cut-off) and Drain-Source NOT connected If current IS flowing in Gate, transistor turns “on” (triode) and Drain-Source ARE connected p-type n-type D G S D G S Side view

Transistor Circuit Rep. vs. Block diagram Chips is composed of nothing but transistors and wires. Small groups of transistors form useful building blocks. Block are organized in a hierarchy to build higher-level blocks: ex: adders. abc

The Clock Signal In graphical form, for a brief instant. Distributed throughout the processor chip. Synchronizes all activities. Typical rate is 1GHz ⇒ 1ns (1 x 10-9 sec)

信号和波形 观察 : 信号绝大多数时间 在高或低电平 信号值并不正好在 最值处 变化由时钟信号同 步 低电压 / 高电压 ⇒ 0 / 1 Circuits have “restoration （恢复） ” property 时钟控制何时信号获得新值（ Clock controls when signals take on new values ）

Signals and Waveforms: Grouping

Signals and Waveforms: Circuit Delay

电路类型 同步数字系统 (Synchronous Digital Systems) 由两种基本电路组成 : Combinational Logic (CL) circuits 组合逻辑电路 例：前面的加法电路. 输出仅为输入的函数. 与数学上的函数相似, y = f(x). ( 无法在两次调用之间存 储信息. 没有副作用 ) x 改变, y 会立即改变 ( 在短暂的延时之后 ) 特别注意 : 这不象函数调用 ! F 是连续作用的. 不是被调 用的 状态单元 (State Elements): 存储信息的电路.

Circuits with STATE (e.g., register) 例：寄存器、内存 在 “LOAD” 信号的控制下，寄存器 捕捉输入值，并立即存储 寄存器中存储的值出现在输出端（ 延时一会儿后） 在下次 ”load” 信号前， Input 线上 的变化将无效（和组合逻辑不同， 在组合逻辑中输入的变化将立即反 映到输出） 这些用于短时存储（如寄存器文件 ），实现数据在处理器之间的转移

Truth Tables for Representing CL Blocks 真值表给出了组合逻辑块 函数的精确定义 每行对应于每一种可能的 输入组合 对所有组合逻辑电路都是 可行的，但实践中，仅对 有限个输入有用

真值表（ Truth Table ）例子 : 2- 位加法器

Peer Instruction A. SW can peek at HW (past ISA abstraction boundary) for optimizations B. SW can depend on particular HW implementation of ISA C. Timing diagrams serve as a critical debugging tool in the EE toolkit ABC 1: FFF 2: FFT 3: FTF 4: FTT 5: TFF 6: TFT 7: TTF 8: TTT

And in conclusion… ISA is very important abstraction layer Contract between HW and SW Clocks control pulse of our circuits Voltages are analog, quantized to 0/1 Circuit delays are fact of life Two types of circuits: Stateless Combinational Logic (&,|,~) State circuits (e.g., registers)