Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering Computer Organization Lecture 18 IF, ID, R-type microprogramming Exam 2 review

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering Microprogramming overview Review instructions, understand goals Determine state diagram Microprogram individual instructions –List tokens on one line –Repeat for remaining clocks Merge all instructions Test, test, test

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering MicroAsm Java application: MicroAsm.class, SavitchIn.class Microinstruction: free format, no fixed fields Requires input file: text-only, file.upg Creates output file: file.txt Errors: command line file name, file I/O, unrecognizable token Execution: BlueJ or DOS command line

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering MicroAsm syntax Directives org: nbr Sets uPC to value of nbr, used with branch token // comment Everthing after // ignored Each line –directives (optional) –tokens (signals to assert) –last line contains return

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering MicroAsm source format

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering uProgram tokens TokenValueFunction Branch Branch the uPgm to the opcode (default is next address) Rwr Write to the REG file Imm uPgm controls ALU function (default is IR[3:0]) PCinc Increment the PC PCwr Write to the PC PCwrcond Write to the PC if EQ is asserted EPC Select EPC for PC write IoD Select RALU for memory address (default is PC) MEMwr Write to the memory (default is to read) IRwr Write to the IR MDRwr Write to the MDR

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering uProgram tokens, continued. TokenValueFunction SPCwr Write to SPC register PCsrc PC write data is branch address (default is jump address) ALUa-R0 ALUa-PC First ALU argument is R0 First ALU argument is PC (default is PC) ALUb-R1 ALUb-Ext ALUb-Trnc Second ALU argument is R1 Second ALU argument is Sign Extended offset Second ALU argument is Truncated offset REG-RALU REG-MDR REG write data is the RALU REG write data is the MDR

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering uProgram tokens, continued. TokenValueFunction REGfmt Selects IR[10] for the REG destination (default is IR[9]) ALUOpadd ALUOpsub ALUOpand ALUOpor ALUOpsll ALUOpsrl ALU function is add ALU function is subtract ALU function is logical AND ALU function is logical OR ALU function is shift left logically ALU function is shift right logically Next Return uPC+1 00 Inserts uPC+1 into uPgm next address (default) Inserts 00 into uPgm next address

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering Partial MDP16 state diagram A G C D E F H B JI Lw or Sw R-fmt Beq Jump Reset Lw Sw

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering MDP16 state diagram IDID sll no p R- f m t swsw srllw add i be q j ori sub i and i IF Reset 1- 3 additional clocks 2 clocks

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering IF state ? Write instruction from memory into IR Increment the program counter IRwr PCin c

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering ID state ? Determine optimistic branch address Branch to opcode Alua-pc Alub-ext imm aluopadd branch

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type instruction Op code: 01 Func bits (IR[3:0]) determine ALU operation Write result into register file

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type EX state? Origin: 0x10 Operation: clock 3 –RALUout = A funct B Functional units –ALU funct = IR[0:3] –ALU inputs R0 R1 Org: 10 alua-r0 Alub-r1

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type WB state? Next: return to IF Operation: clock 4 –Reg [ IR(9)] = ALUout Functional units –Must write to reg file –Data comes from RALU –Use IR[9] as destination register rwr reg-ralu return

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering Exam 2 review See website Syllabus & Reference page

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering IF state ? Write instruction from memory into IR Increment the program counter IRWr PCinc

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering ID state ? Determine optimistic branch address Dispatch to opcode Imm aluA_Pc aluB_Ext aluOpAdd branch

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering IF, ID microprogram Two microinstructions, two ROM contents

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type microprogram Func bits (IR[3:0]) determine ALU operation Write result into register file aluA_R0 aluB_R1 Rwr reg_Ralu Return

Fall EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type microprogram