MICAS Department of Electrical Engineering (ESAT) Update of the “Digital EMC project” December 12, 2006 AID–EMC: Low Emission Digital Circuit Design Junfeng Zhou Wim Dehaene KULeuven ESAT-MICAS

MICAS Department of Electrical Engineering (ESAT) Part I: Additional TF measurement – high frequency up to 2 GHz, – current injection method. Part II: New structure ready for FIB (Focusd ion beam) work frequency domain, time domain, conclusion. Part III: Future plan and related work Outline

MICAS Department of Electrical Engineering (ESAT) Measured TF up to 2 GHz 1GHz100MHz10MHz1MHz > 30 dB

MICAS Department of Electrical Engineering (ESAT) Measured TF – AC - current injected by current probe 100MHz 10MHz 1MHz > 30 dB

MICAS Department of Electrical Engineering (ESAT) New structure for FIB work stimulus 1. Req : moving the output pole to high frequency, improving the dynamic di/dt rejection 2. R_ndl: parasitic resistance introduced by FIB C_offchip: 3. C_offchip: a.Make the Vctrl dominant, b.Emulate the reduction of Gm OTA

MICAS Department of Electrical Engineering (ESAT) New structure for FIB work -cont. Req

MICAS Department of Electrical Engineering (ESAT) Current TF vs. R ndl C tank : 100 pF I load : 1 mA C off-chip : 100 nF R eq : 10 K 30 Ohms 20 Ohms 10 Ohms TF vs. R ndl -3dB - 10 dB - 20 dB - 30 dB - 40 dB - 50 dB 100k 10M1G 1K 150 KHz In real situation, R ndl is gone !!

MICAS Department of Electrical Engineering (ESAT) Current TF vs. I Load C tank : 100 pF R ndl : 20 ohm C off-chip : 100 nF R eq : 10 K 40 mA 9 mA 100 uA TF vs. I Load -3dB - 10 dB - 20 dB - 30 dB - 40 dB - 50 dB 100k10M 1G 1K 2 mA 447 uA 150 KHz

MICAS Department of Electrical Engineering (ESAT) Transient simulation I VDD Vout Vctrl R eq =1K Ohm C offchip =100 nF, R ndl =30 Ohm, R eq =1K Ohm, C tank =100 pF. Pulse width = 10 ns, Time interval = 500 ns

MICAS Department of Electrical Engineering (ESAT) Transient simulation – cont. I VDD Vout Vctrl R eq =10K Ohm C offchip =100 nF, R ndl =30 Ohm, R eq =10K Ohm, C tank =100 pF. Pulse width = 10 ns, Time interval = 500 ns too low Can not recover to 8V

MICAS Department of Electrical Engineering (ESAT) Conclusion on the FIB work Basically, this new structure ready for FIB works fine both in frequency and time domain, Basically, this new structure ready for FIB works fine both in frequency and time domain, The smaller R ndl, the better EMI suppression and the lower the -3 dB frequency. It won’t hurt in real situation. The smaller R ndl, the better EMI suppression and the lower the -3 dB frequency. It won’t hurt in real situation. Trade-off on R eq : Trade-off on R eq :  The smaller R eq, the lower 3-dB frequency and the higher current peak the EMI-Suppressing Regulator can sustain;  However, the smaller R eq, the more DC currents the circuit burns.

MICAS Department of Electrical Engineering (ESAT) Future plan FIB the EMI-Suppressing regulator & measurements, FIB the EMI-Suppressing regulator & measurements, Characterization & quantification of EME from AMIS digital test structures, Characterization & quantification of EME from AMIS digital test structures,  The effectiveness of direct supply, LDO or serial regulator on EMC performance,  The impact of lowering the digital supply voltage on EMC performance,  The impact of the number of gates on EMC performance,  The impact of using D_FF or MS_FF on EMC performance,  The effectiveness of distributed NMOS, PMOS and MIM decoupling capacitors,  … Prediction of EME of digital circuits, Prediction of EME of digital circuits,

MICAS Department of Electrical Engineering (ESAT) Questions Thank you for your attention