Counters Computer Organization I 1 June 2010 ©2006-10 McQuain, Feng & Ribbens JK Flip-flop The JK flip-flop takes two data inputs and updates its.

Slides:

Advertisements

Similar presentations

Registers Computer Organization I 1 September 2009 © McQuain, Feng & Ribbens A clock is a free-running signal with a cycle time. A clock may.

Advertisements

Computer Science 210 Computer Organization Clocks and Memory Elements.

Latches CS370 –Spring 2003 Section 4-2 Mano & Kime.

Flip-Flops Computer Organization I 1 June 2010 © McQuain, Feng & Ribbens A clock is a free-running signal with a cycle time. A clock may be.

1 Fundamentals of Computer Science Sequential Circuits.

Digital Logic Chapter 5 Presented by Prof Tim Johnson

Sequential Logic Computer Organization Ellen Walker Hiram College Figures from Computer Organization and Design 3ed, D.A. Patterson & J.L. Hennessey, Morgan.

EKT 124 / 3 DIGITAL ELEKTRONIC 1

ECE 331 – Digital System Design Flip-Flops and Registers (Lecture #18) The slides included herein were taken from the materials accompanying Fundamentals.

ENGIN112 L20: Sequential Circuits: Flip flops October 20, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 20 Sequential Circuits: Flip.

Generate a clock pulse clk inp outp

CS 151 Digital Systems Design Lecture 20 Sequential Circuits: Flip flops.

ENGIN112 L27: Counters November 5, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 27 Counters.

CS370 Counters. Overview °Counter: A register that goes through a prescribed series of states °Counters are important components in computers. °Counters.

ECE 331 – Digital System Design Counters (Lecture #18)

M.S.P.V.L. Polytechnic College, Pavoorchatram

Sequential Circuit Introduction to Counter

Unit 12 Registers and Counters Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh.

Electronic Counters.

A presentation on Counters

Flip-Flop Applications Registers.  a register is a collection of flip-flops  basic function is to hold information  a shift register is a register.

1 EENG 2710 Project Synchronous Counters. 2 Counters Counter: A Sequential Circuit that counts pulses. Used for Event Counting, Frequency Division, Timing,

Asynchronous Counter © 2014 Project Lead The Way, Inc.Digital Electronics.

Counter Section 6.3.

Sequential Logic - An Overview

Flip Flops. Clock Signal Sequential logic circuits have memory Output is a function of input and present state Sequential circuits are synchronized by.

Unit 11 Latches and Flip-Flops Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh.

Sequential Circuits Chapter 4 S. Dandamudi To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S.

ETE Digital Electronics

ECE 320 Homework #6 Derive the state table and state diagram of the sequential circuit of the Figure below. What is the function of the circuit? A’ A.

Asynchronous Counters with SSI Gates

Rise and rise again until lambs become lions 授課老師：伍紹勳課程助教：邱麟凱、江長庭.

T Flip-Flop A T (toggle) flip-flop is a complementing flip-flop and can be obtained from a JK flip-flop when the two inputs are tied together. When T =

Rabie A. Ramadan Lecture 3

ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN Lecture 17 Dr. Shi Dept. of Electrical and Computer Engineering.

Synchronous Counters Synchronous digital counters have a common clock which results in all the flip-flops being triggered simultaneously. Consequently,

Sequential logic circuits

Decade Counter (BCD Counter). Introduction A counter which is reset at the 10 th clock pulse is called decade counter. The decade counter is otherwise.

Counters and Registers Synchronous Counters. 7-7 Synchronous Down and Up/Down Counters  In the previous lecture, we’ve learned how synchronous counters.

Counters Prepared by: Careene McCallum-Rodney. Introduction Counters uses a Toggle Flip Flops to count either UP or DOWN in binary. A toggle flip flop.

Sequential Logic Computer Organization II 1 © McQuain A clock is a free-running signal with a cycle time. A clock may be either high or.

Basic terminology associated with counters Technician Series

CPU Overview Computer Organization II 1 February 2009 © McQuain & Ribbens Introduction CPU performance factors – Instruction count n Determined.

1 Lecture #13 EGR 277 – Digital Logic Sequential Counters Counters are an important class of sequential circuits. Counters follow a predetermined sequence.

3 BIT DOWN COUNTER SUBJECT: DIGITAL ELECTONICS CODE: COLLEGE: BVM ENGINEERING COLLEGE COLLEGE CODE:008 ELECTRONICS & TELECOMMUNICATION DEPT.

Counters and registers Eng.Maha Alqubali. Registers Registers are groups of flip-flops, where each flip- flop is capable of storing one bit of information.

Dept. of Electrical and Computer Eng., NCTU 1 Lab 10. Up/Down Counter Presenter: Chun-Hsien Ko Contributors: Chung-Ting Jiang and Lin-Kai Chiu.

Sequential logic circuits First Class 1Dr. AMMAR ABDUL-HAMED KHADER.

1 Lecture #15 EGR 277 – Digital Logic Reading Assignment: Chapter 5 in Digital Design, 3 rd Edition by Mano Example: (Problem 5-17 from Digital Design,

UP/DOWN SYNCHRONOUS COUNTERS An up/down counter is one that is capable of progressing in either direction through a certain sequence. An up/down counter,

LATCHED, FLIP-FLOPS,AND TIMERS

Clocks A clock is a free-running signal with a cycle time.

Introduction CPU performance factors

Prof. Hsien-Hsin Sean Lee

Sequential Circuit: Counter

Dr. Clincy Professor of CS

DR S. & S.S. GHANDHY ENGINEENRING COLLEGE

KS4 Electricity – Electronic systems

KS4 Electricity – Electronic systems

Registers and Counters Register : A Group of Flip-Flops. N-Bit Register has N flip-flops. Each flip-flop stores 1-Bit Information. So N-Bit Register Stores.

Asynchronous Counters with SSI Gates

Dr. Clincy Professor of CS

Composing the Elements

KS4 Electricity – Electronic systems

Flip Flops Unit-4.

Clocks A clock is a free-running signal with a cycle time.

Multiplexor A multiplexor is a device that takes a number of data inputs and selects one of them to pass through as its output. The interface of a multiplexor.

Presentation transcript:

Counters Computer Organization I 1 June 2010 © McQuain, Feng & Ribbens JK Flip-flop The JK flip-flop takes two data inputs and updates its state Q, on a clock tick, according to the table: J K Q ~Q CK J K Q ~Q no change opposite In Logisim, the JK flip-flops updates state on the rising edge (when the clock goes from low to high).

Counters Computer Organization I 2 June 2010 © McQuain, Feng & Ribbens A mod-16 Counter We can use JK flip-flops to implement a 4-bit counter: Note that the J and K inputs are all set to the fixed value 1, so the flip-flops "toggle". As the clock signal runs, the circuit will cycle its outputs through the values 0000, 0001, 0010,..., 1111 and then repeat the pattern. So, it counts clock ticks, modulo 16.

Counters Computer Organization I 3 June 2010 © McQuain, Feng & Ribbens mod-16 Counter: first tick Suppose the counter is in the initial state shown below (output is 0000 ). When the clock cycles from high to low: -the left-most sees its (inverted) clock signal go from low to high, and so it toggles its state to 1 -the next flip-flop sees its clock signal go from high to low, and so it doesn't toggle -and so, neither do the other flip-flops… So, the output is 0001.

Counters Computer Organization I 4 June 2010 © McQuain, Feng & Ribbens mod-16 Counter: second tick Suppose the counter is now in the state shown below (output is 0001 ). When the clock cycles from high to low (2 nd cycle): -the left-most sees its (inverted) clock signal go from low to high, and so it toggles its state to 0 -the next flip-flop sees its clock signal go from low to high, and so it toggles its state to 1 -the next flip-flop sees its clock signal go from high to low, so it doesn't toggle So the output is 0010.

Counters Computer Organization I 5 June 2010 © McQuain, Feng & Ribbens mod-16 Counter: third tick Suppose the counter is now in the state shown below (output is 0010 ). When the clock cycles from high to low (3rd cycle): -the left-most sees its (inverted) clock signal go from low to high, and so it toggles its state to 1 -the next flip-flop sees its clock signal go from high to low, and so it doesn't toggle So the output is 0011.

Counters Computer Organization I 6 June 2010 © McQuain, Feng & Ribbens A mod-8 Parallel Counter We can use JK flip-flops to implement a 3-bit parallel counter: As the clock signal runs, the circuit will cycle its outputs through the values 000, 001, 010,..., 111 and then repeat the pattern. So, it counts clock ticks, modulo 8.