III] Logical Group 1)ANA r : LOGICAL AND REGISTER WITH ACCUMULATOR Format : [A] [A] Λ [r] Addressing : Register addressing Group : Logical group Bytes.

Slides:



Advertisements
Similar presentations
PROGRAMMING WITH 8085 BTCS-404 (MALP) B.Tech 4th SEM. IT
Advertisements

Dept. of Electronics A. N. College, Patna M. Sc
Parul Polytechnic Institute Subject Code : Name Of Subject : Microprocessor and assembly language programming Name of Unit : 8085 instruction set.
TK 2633 Microprocessor & Interfacing
TK 2633 Microprocessor & Interfacing Lecture 3: Introduction to 8085 Assembly Language Programming (2) 1 Prepared By: Associate Prof. Dr Masri Ayob.
Room: E-3-31 Phone: Dr Masri Ayob TK 2633 Microprocessor & Interfacing Lecture 1: Introduction to 8085 Assembly Language.
Room: E-3-31 Phone: Dr Masri Ayob TK 2633 Microprocessor & Interfacing Lecture 1: Introduction to 8085 Assembly Language.
Dr Masri Ayob TK 2633: Microprocessor & Interfacing Lecture 5: Arithmetic and Logic Instructions.
Microprocessor Systems Design I Instructor: Dr. Michael Geiger Fall 2012 Lecture 10: Flag control instructions Conditional execution.
Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction.
8085 Addressing Modes.  The number & Different kind of ways the programmer can refer to data stored in the memory  The different ways that a microprocessor.
ADDRESSING MODES OF Addressing Modes of  To perform any operation, we have to give the corresponding instructions to the microprocessor.
Parul Polytechnic Institute Parul Polytechnic Institute Subject Code : Name Of Subject : Microprocessor and assembly language programming Name.
Mr. Gursharan Singh Tatla
Rabel Talpur:12BME#025.  40-pin chip  Developed by Motorola in 1975  16 address lines and 8 data lines  Used only +5V.
INSTRUCTION SET OF MICROPROCESSOR 8085
UNDERSTANDING ASSEMBLY LANGUAGE.
Microprocessor Dr. Rabie A. Ramadan Al-Azhar University Lecture 7.
Microprocessors Monday, Apr. 13 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University.
Ass. Prof. Dr Masri Ayob Lecture 5: Arithmetic and Logic Instructions TK 2633: Microprocessor & Interfacing.
ASSEMBLY LANGUAGE.  Upon completing this topic, you should be able to: Classify the 8085A microprocessor instructions Explain the basic function of common.
Computer Architecture Lecture 11 by Engineer A. Lecturer Aymen Hasan AlAwady 10/3/2014 University of Kufa - Information Technology Research and Development.
Parul Polytechnic Institute Subject Code : Name Of Subject : Microprocessor and assembly language programming Name of Unit : Instruction cycle.
Memory Addressing Techniques. Immediate Addressing involves storing data in pairs with immediate values register pairs:
Microprocessor Dr. Rabie A. Ramadan Al-Azhar University Lecture 8.
Arithmetic and Logic Instructions
CHAPTER 6 ARITHMETIC, LOGIC INSTRUCTIONS, AND PROGRAMS.
Assembly Language Programming of 8085 BY Prof. U. V. THETE Dept. of Computer Science YMA.
The Assemble, Unassemble commands of the debugger: U Command for converting machine code language source Equivalent machine code instructions Equivalent.
Chapter 7 Bit Manipulation. 7.1 Logical Operations.
Ass. Prof. Dr Masri Ayob TK 2123 Lecture 14: Instruction Set Architecture Level (Level 2)
Universal College Of Engineering & Technology UCET 1/27.
8 085Microprocessor Temp Reg (8) Accumulator (A reg) Flag flip flops(8) Instruction Register (8) Arithmetic Logic Unit ALU Instruction Decoder and Machine.
نظام المحاضرات الالكترونينظام المحاضرات الالكتروني 8085 Instruction Set logic group. Branch group. Stack memory and machine control. Addressing modes.
نظام المحاضرات الالكترونينظام المحاضرات الالكتروني 8085 Instruction Set Instruction types. data transfer group. Arithmetic group.
Addressing Modes of 8085 μP PRESENTED BY:- KRISHNA BALLABH GUPTA
Introduction to 8085 Microprocessor
8085 Microprocessor Architecture
Gursharan Singh Tatla INSTRUCTION SET OF 8085 Gursharan Singh Tatla Gursharan Singh Tatla
Unit 1 Instruction set M.Brindha AP/EIE
PROGRAMMING OF 8085 PROCESSOR
Classification of Instruction Set of 8051
Gunjeet Kaur Dronacharya Group of institutions
Assembly Language Programming of 8085
Microprocessor T. Y. B. Sc..
Detailed Review of the 8085 Instruction Set.
3.Instruction Set of 8085 Consists of 74 operation codes, e.g. MOV
Microprocessor Systems Design I
1. Introduction A microprocessor executes instructions given by the user Instructions should be in a language known to the microprocessor Microprocessor.
Lecture Set 5 The 8051 Instruction Set.
Introduction to 8085 Instructions
TAO1221 COMPUTER ARCHITECTURE AND ORGANIZATION LAB 3 & 4 Part 2
A Closer Look at Instruction Set Architectures: Expanding Opcodes
Instruction Formats Each instruction consists of two parts:
Instruction Groups The 8051 has 255 instructions.
Additional data transfer and 16 bit arithmetic instruction Lecture 1
EMT 245: lecture 4: assembly language
MICROPROCESSOR AND PERIPHERAL DEVICES
The 8051 Assembly Language Arithmetic & Logic Instructions
Detailed Review of the 8085 Instruction Set.
Prepared by Kenan BOZDAŞ
Chapter 1 Introduction.
INSTRUCTION SET OF 8085.
8085 MICROPROCESSOR 8085 CPU Registers and Status Flags S Z AC P C A B
Programmer’s View of the EAGLE
Arithmetic Instructions By Dr. S. N. Sampat, Team leader Ms. R. P
Programming Examples.
Logical Operations ANL / ORL
ARITHMETIC, LOGIC INSTRUCTIONS, AND PROGRAMS
Addressing Modes of 8085.
Presentation transcript:

III] Logical Group 1)ANA r : LOGICAL AND REGISTER WITH ACCUMULATOR Format : [A] [A] Λ [r] Addressing : Register addressing Group : Logical group Bytes : 1 Byte Flags : S, Z, P are modified Cy =0, Ac = 1 The content of accumulator is logically ANDed with the content of register r. result is placed in accumulator. S, Z & P flags are modified. Cy flag is reset. Ac flag is set. Example : Let [A] = 52 H & [C] = 36 H Instruction : ANA C [A] : 52 H = [C] : 36 H = ___________ = 12 H After Execution : [A] = 12 H Flags : S = 0, Z = 0, P = 1 Ac = 1, Cy = 0

III] Logical Group 2)ANA M : LOGICAL AND MEMORY WITH ACCUMULATOR Format : [A] [A] Λ [[H][L]] Addressing : Register Indirect addressing Group : Logical group Bytes : 1 Byte Flags : S, Z, P are modified Cy =0, Ac = 1 The content of accumulator is logically ANDed with the content of memory location whose address is stored in HL register pair. result is placed in accumulator. S, Z & P flags are modified. Cy flag is reset. Ac flag is set. Example : Let [A] = 25 H, [H-L] = C050 H, & [C050] = 33 H Instruction : ANA M [A] : 25 H = AND [C050] : 37 H = ___________ = 25 H After Execution : [A] = 25 H Flags : S = 0, Z = 0, P = 0 Ac = 1, Cy = 0

III] Logical Group 3)ANI data : AND IMMEDIATE DATA WITH ACCUMULATOR Format : [A] [A] Λ data Addressing : Immediate addressing Group : Logical group Bytes : 2 Bytes Flags : S, Z, P are modified Cy =0, Ac = 1 The content of accumulator is logically ANDed with the 8-bit immediate data specified in 2 nd byte of instruction. Result is placed in accumulator. S, Z & P flags are modified. Cy flag is reset. Ac flag is set. Example : Let [A] = 88 H Instruction : ANI 22 H [A] : 88 H = AND 22 H = ___________ = 00 H After Execution : [A] = 00 H Flags : S = 0, Z = 1, P = 0 Ac = 1, Cy = 0

III] Logical Group 4)ORA r : LOGICAL OR REGISTER WITH ACCUMULATOR Format : [A] [A] V [r] Addressing : Register addressing Group : Logical group Bytes : 1 Byte Flags : S, Z, P are modified Cy =0, Ac = 0 The content of accumulator is logically ORed with the content of register r. result is placed in accumulator. S, Z & P flags are modified. Cy & Ac flags are reset. Example : Let [A] = 52 H & [C] = 36 H Instruction : ORA C [A] : 52 H = [C] : 36 H = ___________ = 76 H After Execution : [A] = 76 H Flags : S = 0, Z = 0, P = 0 Ac = 0, Cy = 0

III] Logical Group 5)ORA M : LOGICAL OR MEMORY WITH ACCUMULATOR Format : [A] [A] V [[H][L]] Addressing : Register Indirect addressing Group : Logical group Bytes : 1 Byte Flags : S, Z, P are modified Cy =0, Ac = 0 The content of accumulator is logically ORed with the content of memory location whose address is stored in HL register pair. result is placed in accumulator. S, Z & P flags are modified. Cy & Ac flags are reset. Example : Let [A] = 25 H, [H-L] = C050 H, & [C050] = 33 H Instruction : ORA M [A] : 25 H = OR [C050] : 37 H = ___________ = 37 H After Execution : [A] = 37 H Flags : S = 0, Z = 0, P = 0 Ac = 0, Cy = 0

III] Logical Group 6)ORI data : LOGICAL OR IMMEDIATE DATA WITH ACCUMULATOR Format : [A] [A] V data Addressing : Immediate addressing Group : Logical group Bytes : 2 Bytes Flags : S, Z, P are modified Cy =0, Ac = 0 The content of accumulator is logically ORed with the 8-bit immediate data specified in 2 nd byte of instruction. Result is placed in accumulator. S, Z & P flags are modified. Cy & Ac flags are reset. Example : Let [A] = 88 H Instruction : ORI 22 H [A] : 88 H = OR 22 H = ___________ = AA H After Execution : [A] = AA H Flags : S = 1, Z = 0, P = 1 Ac = 0, Cy = 0

III] Logical Group 7)XRA r : EXCLUSIVE OR REGISTER WITH ACCUMULATOR Format : [A] [A]  [r] Addressing : Register addressing Group : Logical group Bytes : 1 Byte Flags : S, Z, P are modified Cy =0, Ac = 0 The content of accumulator is logically Exclusive ORed with the content of register r. result is placed in accumulator. S, Z & P flags are modified. Cy & Ac flags are reset. Example : Let [A] = 52 H & [L] = 36 H Instruction : XRA L [A] : 52 H = [L] : 36 H = ___________ = 64 H After Execution : [A] = 64 H Flags : S = 0, Z = 0, P = 0 Ac = 0, Cy = 0

III] Logical Group 8)XRA M : EXCLUSIVE OR MEMORY WITH ACCUMULATOR Format : [A] [A]  [[H][L]] Addressing : Register Indirect addressing Group : Logical group Bytes : 1 Byte Flags : S, Z, P are modified Cy =0, Ac = 0 The content of accumulator is logically Exclusive ORed with the content of memory location whose address is stored in HL register pair. Result is placed in accumulator. S, Z & P flags are modified. Cy & Ac flags are reset. Example : Let [A] = 25 H, [H-L] = C050 H, & [C050] = 33 H Instruction : XRA M [A] : 25 H = EX-OR [C050] : 37 H = ___________ = 12 H After Execution : [A] = 12 H Flags : S = 0, Z = 0, P = 1 Ac = 0, Cy = 0

III] Logical Group 9)XRI data : EXCLUSIVE OR IMMEDIATE DATA WITH ACCUMULATOR Format : [A] [A]  data Addressing : Immediate addressing Group : Logical group Bytes : 2 Bytes Flags : S, Z, P are modified Cy =0, Ac = 0 The content of accumulator is logically Exclusive ORed with the 8-bit immediate data specified in 2 nd byte of instruction. Result is placed in accumulator. S, Z & P flags are modified. Cy & Ac flags are reset. Example : Let [A] = 88 H Instruction : XRI 22 H [A] : 88 H = EX-OR 22 H = ___________ = AA H After Execution : [A] = AA H Flags : S = 1, Z = 0, P = 1 Ac = 0, Cy = 0

III] Logical Group 10)CMP r : COMPARE REGISTER WITH ACCUMULATOR Format : [A] – [r] Addressing : Register addressing Group : Logical group Bytes : 1 Byte Flags : All This compares the content of the given register with content of accumulator. Comparison is done using subtraction of content of register from the content of accumulator. The content of accumulator remains unchanged. (i)If [A] < [r] then Cy = 1 (ii)If [A] = [r] then Z = 1 (iii)If [A] > [r] then Cy = 0 & Z = 0 Example : Let [A] = 88 H & [L] = 99 H Instruction : CMP L After Execution : [A] = 88 H Cy = 1, Z = 0

III] Logical Group 11)CMP M : COMPARE MEMORY WITH ACCUMULATOR Format : [A] – [[H-L]] Addressing : Register Indirect addressing Group : Logical group Bytes : 1 Byte Flags : All This compares the content of the memory location whose address is stored in HL register pair with content of accumulator by subtracting the content of the memory location from the content of accumulator. The content of accumulator remains unchanged. (i)If [A] < [[H-L]] then Cy = 1 & Z = 0 (ii)If [A] = [[H-L]] then Cy = 0 & Z = 1 (iii)If [A] > [[H-L]] then Cy = 0 & Z = 0 Example : Let [A] = 88 H & [H-L] = 9900 H & [9900] = 22 H Instruction : CMP M After Execution : [A] = 88 H Cy = 0, Z = 0

III] Logical Group 12)CPI M : COMPARE IMMEDIATE DATA WITH ACCUMULATOR Format : [A] – data Addressing : Immediate addressing Group : Logical group Bytes : 2 Bytes Flags : All This compares the 8-bit immediate data with the content of accumulator by subtracting the data from the content of accumulator. The content of accumulator remains unchanged. (i)If [A] < 8-bit data then Cy = 1 & Z = 0 (ii)If [A] = 8-bit data then Cy = 0 & Z = 1 (iii)If [A] > 8-bit data then Cy = 0 & Z = 0 Example : Let [A] = 58 H Instruction : CPI 58 After Execution : [A] = 58 H Cy = 0, Z = 1

III] Logical Group 13)RLC : ROTATE ACCUMULATOR LEFT Format : [A n+1 ] [A n ], [A 0 ] [A 7 ], [Cy] [A 7 ] Addressing : Implied addressing Group : Logical group Bytes : 1 Byte Flags : Only Cy may be affected The content of accumulator is rotated to left by 1-bit position. The bit A 7 is stored in bit A 0 as well as in carry flag. Cy A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 Example : Let [A] = 81 H & [Cy] = 0 Instruction : RLC Before Execution : After Execution : [A] = 03 H & Cy =

III] Logical Group 14)RRC : ROTATE ACCUMULATOR RIGHT Format : [A n ] [A n+1 ], [A 7 ] [A 0 ], [Cy] [A 0 ] Addressing : Implied addressing Group : Logical group Bytes : 1 Byte Flags : Only Cy may be affected The content of accumulator is rotated to right by 1-bit position. The bit A 0 is stored in bit A 7 as well as in carry flag. Cy A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 Example : Let [A] = 81 H & [Cy] = 0 Instruction : RRC Before Execution : After Execution : [A] = C0 H & Cy =

III] Logical Group 15)RAL : ROTATE ACCUMULATOR LEFT THROUGH CARRY Format : [A n+1 ] [A n ], [A 0 ] [Cy], [Cy] [A 7 ] Addressing : Implied addressing Group : Logical group Bytes : 1 Byte Flags : Only Cy may be affected The content of accumulator is rotated to left by 1-bit position through carry flag. The carry flag is stored in bit A 0 of accumulator & bit A 7 of accumulator is stored in carry flag. Cy A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 Example : Let [A] = 81 H & [Cy] = 0 Instruction : RAL Before Execution : After Execution : [A] = 02 H & Cy =

III] Logical Group 16)RAR : ROTATE ACCUMULATOR RIGHT THROUGH CARRY Format : [A n ] [A n+1 ], [A 7 ] [Cy], [Cy] [A 0 ] Addressing : Implied addressing Group : Logical group Bytes : 1 Byte Flags : Only Cy may be affected The content of accumulator is rotated to right by 1-bit position through carry flag. The carry flag is stored in bit A 7 bit A 0 is stored in carry flag. Cy A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 Example : Let [A] = 81 H & [Cy] = 0 Instruction : RAR Before Execution : After Execution : [A] = 40 H & Cy =

III] Logical Group 17)CMA : COMPLEMENT THE ACCUMULATOR Format : [A] [Ā] Addressing : Implied addressing Group : Logical group Bytes : 1 Byte Flags : None This instruction complements the content of accumulator. Result is placed in accumulator. Example : Let [A] = 5D H = Instruction : CMA After Execution : [A] = = A2 H

III] Logical Group 18)CMC : COMPLEMENT CARRY Format : [Cy] [Cy] Addressing : Implied addressing Group : Logical group Bytes : 1 Byte Flags : Cy This instruction complements the content of carry flag. Example : Let [Cy] = 1 Instruction : CMC After Execution : [Cy] = 0

III] Logical Group 19)STC : SET CARRY Format : [Cy] 1 Addressing : Implied addressing Group : Logical group Bytes : 1 Byte Flags : Cy This instruction sets the carry flag to 1. Example : Let [Cy] = 0 Instruction : STC After Execution : [Cy] = 1 Example : Let [Cy] = 1 Instruction : STC After Execution : [Cy] = 1