1 Very Low Voltage Operation of Benchmark Circuit c6288 Presented By: - Murali Dharan

2 Objectives Reduce the power and power delay product of c6288 benchmark circuit Reduce the power and power delay product of c6288 benchmark circuit To study the effect of voltage reduction on the power dissipation and delay To study the effect of voltage reduction on the power dissipation and delay To operate the circuit at subthreshold voltage region and study its effect To operate the circuit at subthreshold voltage region and study its effect

3 Need for Voltage Reduction P total = P static + P dynamic P total = P static + P dynamic Power dissipation with technology scaling Power dissipation with technology scaling High P static dissipation from 65nm onwards High P static dissipation from 65nm onwards

4 Circuit Operation Above threshold voltage, transition due to channel current Above threshold voltage, transition due to channel current Scaling down supply voltage reduces Short circuit power Scaling down supply voltage reduces Short circuit power V dd ≤ |V tp | + V tn

5 Why Subthreshold operation? Below threshold voltage, transition due to subthreshold current Below threshold voltage, transition due to subthreshold current I sub = μ 0 C ox (W/L)V t 2 exp {(V GS –V TH + ηV DS )/nV t } V DS = drain to source voltage η: a proportionality factor n = sub threshold slope factor (1 + C d /C ox )

6 c6288 Circuit Design The circuit was designed in Verilog The circuit was designed in Verilog It was synthesized in 0.18 micron technology using LeonardoSpectrum It was synthesized in 0.18 micron technology using LeonardoSpectrum The synthesized netlist was imported into Design Architect The synthesized netlist was imported into Design Architect Timing and power analysis was done using ELDO Timing and power analysis was done using ELDO

7 Model of 16 Bit Multiplier (c6288)

8 Simulation Results Voltage(V) Power (μW) Delay(ns) Power x Delay (fJ)

9 Subthreshold Operation Voltage(V) Power (μW) Delay(ns) Power x Delay (fJ) x x x x

10 Timing Plot

11 Power Delay Product Graphs

12 Conclusion From the graphs, we can infer that the optimum low voltage operating point is 0.4V which is just above the threshold voltage. From the graphs, we can infer that the optimum low voltage operating point is 0.4V which is just above the threshold voltage. Circuit still functions properly in subthreshold region and gives comparable energy savings to normal operation mode. Circuit still functions properly in subthreshold region and gives comparable energy savings to normal operation mode. More circuits need to be tested to check for subthreshold voltage operations. More circuits need to be tested to check for subthreshold voltage operations. Check circuits in high leakage technologies like 65nm and below. Check circuits in high leakage technologies like 65nm and below.

13 Future Research Work Testing subthreshold operations of sequential circuits to check if operations like feedback causes circuits to malfunction. Testing subthreshold operations of sequential circuits to check if operations like feedback causes circuits to malfunction. Testing subthreshold operation of benchmark circuits at high leakage technologies as more leakage current can lead to faster switching with less power overhead leading to more energy savings. Testing subthreshold operation of benchmark circuits at high leakage technologies as more leakage current can lead to faster switching with less power overhead leading to more energy savings.

14 References Spring 2009 slides: ELEC6270 Low Power Design of Electronic Circuits Spring 2009 slides: ELEC6270 Low Power Design of Electronic Circuits Dr. Vishwani D. Agrawal Dr. Vishwani D. Agrawal “Modeling and sizing for Minimum Energy Operation in Subthreshold Circuits” “Modeling and sizing for Minimum Energy Operation in Subthreshold Circuits” IEEE Journal of Solid-State Circuits, Vol.40, No. 9, September 2005 Benton H. Calhoun, Student member, IEEE, Alice Wang, Member, IEEE, and Anantha Chandrakasan, Fellow, IEEE Benton H. Calhoun, Student member, IEEE, Alice Wang, Member, IEEE, and Anantha Chandrakasan, Fellow, IEEE