Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen 2003.10.3 present.

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Presentation transcript:

Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen present

Outline Using abstract C_Modeling to see architectural developments Optimizing Bus Arbitration Using Seamless with C-Bridge Example (simple picture displayer)

Introduction Objective Reduce system verification runtimes Verification earlier Methodology Verify system components in high-level C models Built around an ARM 926 embedded processor Seamless C-Bridge co-verification environment

Abstraction C-Modeling Create and simulate faster than RTL model Verify the design during the early stages Less costly, accomplishing tasks early, boost design productivity Reduce time to debug problems at detail level Devote more time to improving their designs

Optimizing Bus Arbitration Using Seamless with C-Bridge Performance analysis (Version 5) Better understanding of the performance characteristics of their design Immediate feedback of design change C-Bridge allows the hardware to be an abstract C-model Mix-and-match C and HDL models written at different abstraction levels

Example: picture displayer Purpose : to see whether the system still functions correctly after additional timing information A basic block diagram for a simple picture displayer

Example: picture displayer (cont.) Seamless Version 5 Performance Profiler bus loading view. Fix the problem by modifying the arbitration scheme dynamically, without leaving the simulation. Change dynamically by sending a command to the arbiter model

Example: picture displayer (cont.) Seamless Version 5 Performance Profiler arbitration delay view. 0~10 (ms) : attempt to display a picture 10~20 (ms) : picture display process where the maximum value of 16 is used for arbiter parameter 20~30 (ms) : parameter reduce to 4

Conclusion Abstract modeling and the Seamless performance analysis engine reduce overall verification times Contribute to the creation of optimal designs Increases design productivity, boosts confidence in the design of complex system.