1 Connections Central Building North End West End Pr Qr Pr Qr Pr Qr GClocking GC alignment Sc *10 Sa Pr Inj. Timing SystemDOL inputDOL outputLocal InputLocal output Photodiode Readout10100 Global Control14 (+10?)1011 Suspension120 (1?)11

2 Block Diagram VME PCI DSP Local Bus VSB DSP #1 DSP #2 DSP #3 DSP #4 DSP #5 DSP #6 Flash Memory LB2VSB Bridge PCI2LB Bridge PCI2VME Bridge PCI2PCI Bridge PC104Plus CPU Module Fast Ethernet Console DOLDOLTimingTiming Dual Port Memory Front Panel Serial link Link Port 43 PC104Plus CPU Module Fast Ethernet Console Front Panel

3 DOL/Timing mezzanine Optical transmitter PCI connector CONNECTORDSPCONNECTORDSP PCI target interface Timing Interface FPGA Optical Interface Optical transmitter Optical receiver Clk Synchronization 32bits GPS words External clk Serial port Link ports DOL Misc

4 DOL Extension (Global Control) Optical transmitt er DOL Optical transmitt er DOL Optical transmitt er DOL Optical transmitt er DOL Optical transmitt er DOL Optical transmitt er DOL Optical transmitt er DOL Optical transmitt er DOL Optical transmitt er DOL Optical transmitt er DOL Connector P1 P2 FPGA VME interface (config and control) and interface between the mezzanine board and the 10 optical transmitters

5 VME Connectors PC104Plus 9.5 x 9 DSP 7 x 14 4 cm 14.8 cm 5.5 cm DOL & Timing