CS 3220: Compilation Techniques for Parallel Systems Spring Pitt CS 32201

2/11/2016 Pitt CS Phases of A Modern Compiler Lexical Analyzer Syntax Analyzer Semantic Analyzer Code Optimizer Code Generation Source Program IF (a<b) THEN c=1*d; Token Sequence Syntax Tree 3-Address Code Optimized 3-Addr. Code Assembly Code IF( ID “a” < ID “b” THEN ID “c” = CONST “1” * ID “d” IF_stmt < a b cond_expr list assign_stmt c * lhs rhs 1 d GE a, b, L1 MUlT 1, d, c L1: GE a, b, L1 MOV d, c L1: loadi R1,a cmpi R1,b jge L1 loadi R1,d storei R1,c L1:

2/11/2016 Pitt CS Three-pass Compilation Front End Middle End Back End Source program IR machine code CS 2210CS 3220

Organization of CS 3220  Advanced compilation techniques  Dataflow analysis framework  Selected compilation techniques Pointer analysis, software pipelining, SSA, and more  Parallel architectures  Traditional parallel systems Multiprocessor, vector machine, VLIW  Chip-multiprocessor systems Challenges and opportunities  Student presentations Pitt CS

2/11/2016 Pitt CS Control Flow Graph (CFG) 1.A=4 2.T1=A*B 3.L1: T2 = T1/C 4.If T2<W goto L2 5.M=T1*K 6.T3=M+1 7.L2: H=I 8.M=T3-H 9.If T3>0 goto L3 10.GOTO L1 11.L3: halt 1. A=4 2. T1=A*B B1 3. L1: T2=T1/C 4. If T2<W goto L2 B2 5. M=T1*K 6. T3=M+1 B3 7. L2: H=I 8. M=T3-H 9. If T3>0 goto L3 B4 10. Goto L1 B5 11. L3: halt B6

2/11/2016 Pitt CS Dominators and Postdominators  Definition  Node a dominates b if and only if every possible execution path from the entry of the code to b include a. For example, B1 dominates B2, B3, …  Node a postdominates b if and only if every possible execution path from b to exit include a. For example, B4 postdominates B2

2/11/2016 Pitt CS Finding a Loop  Back edge  A back edge is an edge a  b and head b dominates its tail a That is, The edge B5  B2 in the previous example  Natural loops  A natural loop has Header: a single-entry node that dominates all nodes in the loop; Back edge: a back edge that enter from the header.

2/11/2016 Pitt CS Global Dataflow Analysis  Dataflow analysis framework  A standard technique for solving global analysis problems  A formal approach  Definition: a DFA consists of the following components  L: A set of partially ordered elements, the set can be infinite  Two special elements: top ┬ and bottom ┴  Two operators: meet  join   Dataflow functions: F: L  L

2/11/2016 Pitt CS Forward and Backward Analysis Forward Analysis Backward Analysis X_in X_out X_in X_out

2/11/2016 Pitt CS Example: Liveness Analysis  Once constants have been globally propagated, we would like to eliminate dead code After constant propagation, if x is not used elsewhere, “x:=3” is dead and can be removed X:=3 If B>0 Y:= Z+WY:= 0 A:= 2 * 3

2/11/2016 Pitt CS Global analysis – liveness x:= … (no other definition of x)x is live anywhere here … := x Two names interfere when their values cannot reside in the same register x:= … y:= … x interfere with y … := x-- they are both live simultaneously … := y

2/11/2016 Pitt CS Dataflow Equations for Liveness Analysis  X(i): dataflow property of basic block i  X_in(i): at the entry of basic block i  X_out(i): at the exit of basic block i  Liveness: LV_in(i) = ( LV_out(i) – DEF(i) )  USE(i) LV_out(i) =  LV_in(k) if k is successor basic block of i

2/11/2016 Pitt CS Using Liveness Information Register allocation a:= b+c d:= -a e:= d+f f:= 2*e b:= d+e e:= e -1 b:= f+c {b} { b,c,e,f } { c,d,e,f } { c,f } { c,e } { a,c,f } { c,d,e,f } { b,c,f } { c,d,f } { c,f } { b,c,f }

2/11/2016 Pitt CS Register Interference Graph (RIG)  For our example a f b e c d b, c can NOT be in the same register a, b, d can be in the same register

2/11/2016 Pitt CS Register Allocation Result  For our example a f b e c d There is no coloring with less than 4 colors There are 4 colorings of this graph R2 R1 R3 R4 R2

2/11/2016 Pitt CS After Register Allocation  Use this coloring the code becomes: r2:= r3+r4 r3:= -r2 r2:= r3+r1 r1:= 2*r2 r3:= r3+r2 r2:= r2 -1 r3:= r1+r4