Intel Job Process for Reliability Team Attend the Tech Talk Send your resume directly to ntel.com and ntel.com ntel.com ntel.com Enter your profile at obs and apply direction to specific job# If match, hiring manager will contact you directly to move to next step. Onsite interview with 1hr PHD presentation (CG). Intel decision within 2 weeks.

Logic Technology Development Reliability Latchup Engineer Description Microelectronic Quality Reliability Engineers provide project management, product, process design/development and sustaining support for integrated circuit or semiconductor assemblies, various other electronic components, sub systems and/or completed units. Responsible for physical understanding, model prediction and enhancement of quality & reliability for advanced products, transistor, interconnect, assembly/package and testing process. Defines Si/assembly/package qualification requirement and responsible for product qualification or technology certification. Defines/develops and conducts stress tests, DFX requirements and research on individual technology components as well as integrated circuit/products. Develop cost effective production monitoring and screening schemes to ensure process is stable and products meet committed quality & reliability performance. Your responsibilities may include but not be limited to: Designing and executing experiments to determine the necessary parameters for reliability model development and validation. Developing new acceleration techniques and analytical tools to assure the early identification of potential reliability problems with new products, packaging, boards, and manufacturing processes. Developing risk assessments and making quality and reliability predictions based on data that you will collect using statistical principles and design of experiments fundamentals Evaluating materials, properties and techniques used in production from a reliability standpoint. Creating reliability design layout rules and specifications. Advising design engineering on selection, application and test of electronic components and systems. Collaboration with cross functional teams to solve technical / reliability issues during technology development and ramp to high-volume manufacturing. Recommending process technology certification evaluation and acceptance criteria. Recommending material, design or test methods and statistical process control procedures for achieving required levels of product reliability. This position provides direct support for device latchup characterization and design rule development to enable semiconductor technology development. Duties include defining test structures to characterize the latchup performance of the technology, characterizing latchup performance on isolated test structures as well as integrated test vehicles for process development and certification,developing design rules and verification methodologies to enable robust latchup mitigation techniques,defining new test capability to characterize latchup on test chips as well as integrated test vehicles Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. Minimum Qualifications: The candidate must possess a Ph.D. degree in Electrical Engineering, Physics, Material Science, or a related discipline. Candidate must have 6 + months of work or educational experience in the following Knowledge in one or more of the following areas electron device fabrication, semiconductor device physics, CMOS transistor level circuit design, interconnect reliability, electrostatic discharge, latchup, soft error rate and circuit simulations, PCB fabrication principles, surface mount assembly, board test methods, solder and laminate material behavior under mechanical or thermo-mechanical conditions. Experimental design, execution, and interpretation. Electron device fabrication and characterization. Preferred Qualifications: Electrical measurement equipment in characterizing electron devices (e.g. HP4155, oscilloscope, etc.) Experience with a range of analytical techniques such as SIMS, EEL, EDX, XPS, Auger, acoustic profiling, FTIR, AFM, etc. or various lab imaging techniques (SEM, FIB, TEM, etc.) Programming with a formal language (C,C++, C#, etc.) or a scripting language (AWK, PERL, Python, SQL, TCL, VBScript, etc.) Experience with SQL data extraction. Knowledge of statistical analysis packages (e.g. SAS, JMP, Minitab, R, etc.) Knowledge of silicon and packaging assembly integration, or PCB technology operations Understanding of reliability failure statistics, physics, or failure mechanisms. Prior Intel Intern or Scholarship recipient

Technology Development Reliability Engineer Description Technology development reliability engineer defines roadmaps to meet requirements, goals and milestones for a new technology process. From a quality and reliability perspective, evaluate the materials, properties and techniques used in production. Advises design engineering on selection, application and test of electronic components and systems. Recommends design or test methods and statistical process control procedures for achieving required levels of product reliability. Determines reliability requirements of components and systems to achieve company, customer and any governmental agency reliability objectives. Develops new acceleration techniques and analytical tools to assure the early identification of potential problems with new products, fabrication process, packaging, and product reliability. Makes recommendations for changes in the selection and application of components and systems. May propose changes in design or formulation to improve system and/or process reliability. The ideal candidate should exhibit the following behavioral traits: Excellent communication skills, both written and verbal Capable of driving multiple projects independently and simultaneously Strong team contributor as well as an individual contributor Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. Minimum Qualifications: The candidate must possess a Ph.D. in Mechanical Engineering, Materials Science, Physics, or Electrical Engineering. Candidate must have 6 + months of work or educational experience in the following: strong background in solid mechanics particular in stress evolution, fracture behaviors of small scale structures semiconductor fabrication process, packaging assembly, and/or board system technology operations statistical analysis packages (e.g. JMP or Minitab) Familiarity with a range of imaging and analytical lab test equipment such as acoustic and x-ray imaging, SEM/ EDX/TEM techniques

Fault Isolation Engineer In this position, you will be using knowledge of CMOS device physics, SRAM and logic circuits, and fab processes and equipment, together with new fault isolation and characterization systems. You will be localizing defects and isolating the root causes of process, design, and reliability problems in integrated circuits, and will then provide direction for models of yield and reliability failure mechanisms. Your responsibilities will include but not be limited to: Using automated test equipment (ATE) and other test equipment (system-level testing and curve tracing) along with on-chip DFT-based methods for localizing faults within integrated circuits, Application of high-performance analytical tools such as emission microscopy and laser probing to enable root cause analysis. Providing in-circuit electrical characterization data with nano-probing and other nano-scale characterization techniques. Use circuit simulation and device physics to form hypothesis on root cause, and write instructions for further FA, Focus will be in the advanced development of new communications products on Intel's 14 nm process technology The ideal candidate should exhibit the following behavioral traits: Close interaction with internal groups for rapid information communication, Leading tool/method improvement efforts, Exhibits a bias for action, intolerance of mediocrity, and an internal drive to be the best, Demonstrated strength in analytical problem solving, leadership, commitment to task, discipline, and teamwork skills,Ability to interpret and clearly communicate achieved results to a wide range of audiences and technical experience levels