Copyright © 2007 by Curt Hill Interrupts How the system responds

Connection I/O devices can be connected through I/O ports to the CPU The number of ports is determined by the number of bits, used to access them These I/O ports are usually signified by address lines on the bus Copyright © 2007 by Curt Hill

Communication The CPU can communicate with these ports with a few commands The CPU can request a status code which indicates that status of the device, usually idle or busy Other commands include read data or write data Copyright © 2007 by Curt Hill

Time delays Most I/O devices are incredibly slow compared to a CPU Eg a disk may have a 13ms access time, which is not bad Yet even old computers had instruction times of less than a micro second or is times faster Why should the CPU sit idle while it could execute thousands of instructions while the disk is doing its thing Copyright © 2007 by Curt Hill

Interrupts Very early on it was seen as desirable to overlap instruction and I/O time We then have a synchronization problem that takes one of two forms Both types are solved by interrupts Copyright © 2007 by Curt Hill

Synchronization The CPU may have to get involved when memory is accessed, that is the data is read or written If the CPU does not have to assist in the access of memory, then it still must be notified that something has happened, thus the process that was stalled by an I/O request can now be restarted Copyright © 2007 by Curt Hill

Definition A quick change in the processing of the CPU An interrupt must be attended to on a quick basis Yet it comes at unpredictable times, we do not wait for it We must be able to re-establish whatever process was executing when the interrupt occurred in a transparent way –That is the process should be unable to tell that it had been interrupted and restarted Copyright © 2007 by Curt Hill

Process An interrupt is started by the raising of an interrupt signal –This is usually by a bus control line changing state This must be recognized and responded to There can be multiple interrupts –Must also have an interrupt code that captures what is happening Copyright © 2007 by Curt Hill

Example A key being clicked generates a different interrupt than a disk read to read or write The interrupts may also be prioritized –Disks have much lower latency Copyright © 2007 by Curt Hill

CPU Support The CPU often has an interrupt register used in conjunction with this signal or code Usually it is the case that once this interruption occurs the CPU finishes its current instruction and then deals with the interrupt Copyright © 2007 by Curt Hill

Fetch Execute Part of the fetch execute cycle is dealing with interrupts Some instructions may be so long that they are designed to be interruptible –Eg 370 MVCL which could transfer thousands of bytes in memory –The String instructions of x86 Copyright © 2007 by Curt Hill

Interrupt handlers A routine that deals with the interrupt The goal of an interrupt handler is to: –Save the status of the CPU –Service the interrupt –Restore the CPU and re-execute the process that was in control before Very often interrupt handlers are partially loaded in low memory and elsewhere There usually exists an interrupt table Copyright © 2007 by Curt Hill

Interrupt table This maps the kinds of interrupts to their respective handlers This may be very simple or complicated Simple –Each interrupt is given so many bytes in lowest memory, usually just enough to call the real routine –The interrupt number is multiplied by a constant –This becomes an executable address Copyright © 2007 by Curt Hill

Example for x86 Each routine is 16 bytes Then interrupt zero branches to location 0, interrupt 1 to address 16, 2 to 32 etc. This is easy to make the interrupt number into an address That code was usually a call to a BIOS routine in DOS Which ever OS you ran loaded the lower so many bytes of memory with the addresses of its interrupt handlers Copyright © 2007 by Curt Hill

Kinds of interrupts Critical hardware faults –The power supply just notified us that it lost power –The capacitors will keep us up for a second or two I/O interrupts –A disk is positioned Errors of a less important nature –Divide by zero Service request –Request for an I/O operation to occur Copyright © 2007 by Curt Hill

Maskable interrupts Suppose that you are servicing a disk interrupt and a keyboard interrupt occurs Do you process the newer one even though it is less important or time constrained? –Not usually Instead you set the interrupt mask Copyright © 2007 by Curt Hill

Masked interrupts This mask blocks out lower priority interrupts So an interrupt can only be interrupted by an interruption of higher priority than it Usually the first action of an interrupt is to mask out less important interrupts Copyright © 2007 by Curt Hill

Saving registers One of the universally seen benefits of a stack, is that it is a nice place to save register contents Most interrupt handlers save the CPU registers on a stack at the outset, then do their processing and finally restore them on the stack Some CPUs may have this automatically done as part of processing an interrupt Copyright © 2007 by Curt Hill

Stack Saving registers on the stack works well –If the stack does not overflow Recall the PowerPC has a two stack pointers, one for the user and one for the system –An interrupt puts us in system mode so we save the contents of the registers on the system stack and do not have to worry about disturbing user space Copyright © 2007 by Curt Hill