CEC 220 Digital Circuit Design More Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design Slide 1 of 11.

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Presentation transcript:

CEC 220 Digital Circuit Design More Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design Slide 1 of 11

Lecture Outline Monday, February 02 CEC 220 Digital Circuit Design Four Variable Karnaugh Maps Five Variable Karnaugh Maps Slide 2 of 11

AB CD AB CD AB CD Four Variable Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design Minterm locations for a 4-variable K-map AB CD AB CD Is this the minimum SOP form? Slide 3 of 11

AB CD Four Variable Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design Determine the minimum SOP Form of f AB CD Slide 4 of 11

AB CD Four Variable Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design Determine the minimum SOP Form of f AB CD Slide 5 of 11

AB CD X 0111X X Four Variable Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design Determine the minimum SOP Form of f AB CD Slide 6 of 11

Four Variable Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design Determine the minimum POS Form of f AB CD AB CD Slide 7 of 11

Four Variable Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design The inputs A,B,C,D represent an BCD digit. The output should be 1 iff the input is exactly divisible by three AB CD X0 0100X1 1110XX 1001XX AB CD Slide 8 of 11

Four Variable Karnaugh Maps Five Variable K-maps Monday, February 02 CEC 220 Digital Circuit Design Five Variable K-Maps (A, B, C, D, E)  Can also form groupings “vertically” BC DE BC DE Slide 9 of 11

Karnaugh Maps An Example From CEC 222 Lab 4 Monday, February 02 CEC 220 Digital Circuit Design BI must be “0” for all invalid BCD codes D3D2D1D0BI BI = Implement using NOR gates Slide 10 of 11 D3 D2 D1 D0

Next Lecture Monday, February 02 CEC 220 Digital Circuit Design Implicants Prime Implicants Essential Prime Implicants Slide 11 of 11