Multi-core CPU’s April 9, 2008. Multi-Core at BNL First purchase of AMD dual-core in 2006 First purchase of Intel multi-core in 2007 –dual-core in early.

Slides:



Advertisements
Similar presentations
MULTICORE PROCESSOR TECHNOLOGY.  Introduction  history  Why multi-core ?  What do you mean by multicore?  Multi core architecture  Comparison of.
Advertisements

DOSAR Workshop VI April 17, 2008 Louisiana Tech Site Report Michael Bryant Louisiana Tech University.
Hepmark project Evaluation of HEP worker nodes Michele Michelotto at pd.infn.it.
The CDCE BNL HEPIX – LBL October 28, 2009 Tony Chan - BNL.
OPNET Technologies, Inc. Performance versus Cost in a Cloud Computing Environment Yiping Ding OPNET Technologies, Inc. © 2009 OPNET Technologies, Inc.
Parallel Processing1 Parallel Processing (CS 676) Overview Jeremy R. Johnson.
OPTERON (Advanced Micro Devices). History of the Opteron AMD's server & workstation processor line 2003: Original Opteron released o 32 & 64 bit processing.
1 VT Central Computing Infrastructure Increasing Virtualization William Dougherty Director of Systems Support Network Infrastructure & Services.
Site Report HEPHY-UIBK Austrian federated Tier 2 meeting
HS06 on the last generation of CPU for HEP server farm Michele Michelotto 1.
® IBM Software © IBM Corporation IBM Internal Use Only--Not to be shared outside the company until July 25, 2006 Processor Value Unit Licensing for Middleware.
Intel ® Server Platform Transitions Nov / Dec ‘07.
1b.1 Types of Parallel Computers Two principal approaches: Shared memory multiprocessor Distributed memory multicomputer ITCS 4/5145 Parallel Programming,
Real Parallel Computers. Modular data centers Background Information Recent trends in the marketplace of high performance computing Strohmaier, Dongarra,
Alleviating Constraints with Resource Pools & Live Migration with Enhanced VMotion* Breakout Session# 2823 Raghu Yeluri Sr. Architect Intel Corporation.
Transition to a new CPU benchmark on behalf of the “GDB benchmarking WG”: HEPIX: Manfred Alef, Helge Meinhard, Michelle Michelotto Experiments: Peter Hristov,
Condor at Brookhaven Xin Zhao, Antonio Chan Brookhaven National Lab CondorWeek 2009 Tuesday, April 21.
A performance analysis of multicore computer architectures Michel Schelske.
Computer Performance Computer Engineering Department.
Impact of Network Sharing in Multi-core Architectures G. Narayanaswamy, P. Balaji and W. Feng Dept. of Comp. Science Virginia Tech Mathematics and Comp.
UTA Site Report Jae Yu UTA Site Report 4 th DOSAR Workshop Iowa State University Apr. 5 – 6, 2007 Jae Yu Univ. of Texas, Arlington.
Parallel and Distributed Systems Instructor: Xin Yuan Department of Computer Science Florida State University.
CERN - IT Department CH-1211 Genève 23 Switzerland t Tier0 database extensions and multi-core/64 bit studies Maria Girone, CERN IT-PSS LCG.
Copyright © 2007 Heathkit Company, Inc. All Rights Reserved PC Fundamentals Presentation 27 – A Brief History of the Microprocessor.
Intel’s Penryn Sima Dezső Fall 2007 Version nm quad-core -
New Data Center at BNL– Status Update HEPIX – CERN May 6, 2008 Tony Chan - BNL.
© 2006 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice Profiling and Modeling Resource Usage.
Location: BU Center for Computational Science facility, Physics Research Building, 3 Cummington Street.
14 Aug 08DOE Review John Huth ATLAS Computing at Harvard John Huth.
PDSF at NERSC Site Report HEPiX April 2010 Jay Srinivasan (w/contributions from I. Sakrejda, C. Whitney, and B. Draney) (Presented by Sandy.
JLab Scientific Computing: Theory HPC & Experimental Physics Thomas Jefferson National Accelerator Facility Newport News, VA Sandy Philpott.
Proposed 2007 Acquisition Don Holmgren LQCD Project Progress Review May 25-26, 2006 Fermilab.
HS06 on new CPU, KVM virtual machines and commercial cloud Michele Michelotto 1.
2009/4/21 Third French-Japanese PAAP Workshop 1 A Volumetric 3-D FFT on Clusters of Multi-Core Processors Daisuke Takahashi University of Tsukuba, Japan.
Harnessing Multicore Processors for High Speed Secure Transfer Raj Kettimuthu Argonne National Laboratory.
PSC’s CRAY-XT3 Preparation and Installation Timeline.
Solution to help customers and partners accelerate their data.
MULTICORE PROCESSOR TECHNOLOGY.  Introduction  history  Why multi-core ?  What do you mean by multicore?  Multi core architecture  Comparison of.
Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008.
HS06 on last generation of HEP worker nodes Berkeley, Hepix Fall ‘09 INFN - Padova michele.michelotto at pd.infn.it.
Florida Tier2 Site Report USCMS Tier2 Workshop Livingston, LA March 3, 2009 Presented by Yu Fu for the University of Florida Tier2 Team (Paul Avery, Bourilkov.
Presented by NCCS Hardware Jim Rogers Director of Operations National Center for Computational Sciences.
Industry Standard Servers Infrastructure Refresh Why?
CERN IT Department CH-1211 Genève 23 Switzerland t SL(C) 5 Migration at CERN CHEP 2009, Prague Ulrich SCHWICKERATH Ricardo SILVA CERN, IT-FIO-FS.
Pathway to Petaflops A vendor contribution Philippe Trautmann Business Development Manager HPC & Grid Global Education, Government & Healthcare.
Biowulf: Molecular Dynamics and Parallel Computation Susan Chacko Scientific Computing Branch, Division of Computer System Services CIT, NIH.
Parallel Computers Today Oak Ridge / Cray Jaguar > 1.75 PFLOPS Two Nvidia 8800 GPUs > 1 TFLOPS Intel 80- core chip > 1 TFLOPS  TFLOPS = floating.
UTA Site Report Jae Yu UTA Site Report 7 th DOSAR Workshop Louisiana State University Apr. 2 – 3, 2009 Jae Yu Univ. of Texas, Arlington.
AMS02 Software and Hardware Evaluation A.Eline. Outline  AMS SOC  AMS POC  AMS Gateway Computer  AMS Servers  AMS ProductionNodes  AMS Backup Solution.
 Intel’s Q9450 Processor is one of Intel’s fastest and most recent Quad Core Processors.  Intel have introduced many new factors into this processor.
New CPU, new arch, KVM and commercial cloud Michele Michelotto 1.
The last generation of CPU processor for server farm. New challenges Michele Michelotto 1.
© 2008 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice ProLiant G5 to G6 Processor Positioning.
Multi-Core CPUs Matt Kuehn. Roadmap ► Intel vs AMD ► Early multi-core processors ► Threads vs Physical Cores ► Multithreading and Multi-core processing.
CERN IT Department CH-1211 Genève 23 Switzerland t IHEPCCC/HEPiX benchmarking WG Helge Meinhard / CERN-IT Grid Deployment Board 09 January.
Expansion Plans for the Brookhaven Computer Center HEPIX – St. Louis November 7, 2007 Tony Chan - BNL.
Parallel Computers Today LANL / IBM Roadrunner > 1 PFLOPS Two Nvidia 8800 GPUs > 1 TFLOPS Intel 80- core chip > 1 TFLOPS  TFLOPS = floating point.
Copyright © 2006, Intel Corporation. All rights reserved. Third party marks and brands are the property of their respective owners. All products, dates,
Evaluation of HEP worker nodes Michele Michelotto at pd.infn.it
CCR Autunno 2008 Gruppo Server
How to benchmark an HEP worker node
Gruppo Server CCR michele.michelotto at pd.infn.it
Enhanced vMotion Compatibility
Chapter 6 Warehouse-Scale Computers to Exploit Request-Level and Data-Level Parallelism Topic 11 Amazon Web Services Prof. Zhang Gang
Comparing dual- and quad-core performance
CERN Benchmarking Cluster
Parallel Computers Today
Expanded CPU resource pool with
Presentation transcript:

Multi-core CPU’s April 9, 2008

Multi-Core at BNL First purchase of AMD dual-core in 2006 First purchase of Intel multi-core in 2007 –dual-core in early 2007 –quad-core in late 2007 Motivated to migrate to multi-core –power, space issues –steep ramp-up for ATLAS

Expected Computing Capacity Evolution

Recent SI2K Results CPUOSSI2K/serverSI2K/Watt Xeon 3.4 GHzSL Xeon 3.4 GHzSL Opteron 265SL Opteron 2216SL Opteron 2218SL Opteron 2220 SESL Woodcrest 5150SL Clovertown 5355SL Harpertown 5430SL

Evolution of Space Usage Capacity of current data center Intel dual and quad-core deployed

Evolution of Power Usage Existing UPS Capacity

Benchmark Comparison CPUSpecInt2000Gain (%) ATLAS script (secs.) Gain (%) SpecRateATLAS rate test (secs.) Xeon 3.4 GHz1409 (2 cores) Opteron 265 (1.8 GHz)1169 (4 cores) Xeon 5150 (2.6 GHz)2531 (4 cores) Xeon 5335 (2.0 GHz)1996 (8 cores) Xeon 5440 (2.8 GHz)2862 (8 cores) CPUSpecInt2000Gain (%) PHENIX/ STAR apps (secs.) Gain (%)SpecRatePHENIX/ STAR apps (secs.) Opteron 265 (1.8 GHz)1169 (4 cores) / /13726 Xeon 5345 (2.0 GHz)2266 (8 cores) / / /8521 Xeon 5430 (2.6 GHz)2730 (8 cores) / / */7068

Multi-Core & Facility Operations Migration to multi-core has many advantages –physical consolidation –performance gains –virtualization And also some disadvantages –more complicated facility operations –cost of licensed software –network/memory requirements

Condor configuration for ATLAS

Virtualization

Near-Term Developments 1 st purchase of Intel quad-core Harpertown (5400 series) soon at the RACF AMD Barcelona quad-core available now (1 year late – competitive with Intel Clovertown) Incremental improvements to Harpertown in 2008 Intel Nehalem (next-generation chip on 45 nm technology) available 2 nd -half of 2008 – 1- 8 (or more) cores/cpu More info available by SC-08 in Austin (Nov. 08)

Summary Significant SI2K/Watt gains with multi-core Performance improvements not linear with core count ATLAS/RHIC benchmark test results generally differ somewhat from SI2K Increasing network bandwidth requirements for multi-core (gigE line rate for 8 cores/server) Other challenges ahead with multi-core cpu’s