The Assemble, Unassemble commands of the debugger: U Command for converting machine code language source Equivalent machine code instructions Equivalent assembly statements A command for converting assembly statements

The Go command of the debugger: Format G =[starting address] [breakpoint address] Execute the instructions from the starting address till the breakpoint address appears in the IP register (address of the instruction following the end of the program)

Unsigned Multiplication Format MUL S S is the source: R 8 or R 16, M 8 or M 16 Action [AL] * [S 8 ] [AX] [AX] * [S 16 ] [DX]:[AX] Affects all flags

Signed Multiplication Format IMUL S S is the source: R 8 or R 16, M 8 or M 16 Action [AL] * [S 8 ] [AX] [AX] * [S 16 ] [DX]:[AX] Affects all flags

MOV AL, FF MOV CL,FE MUL CL [AX] = FD02 16 = MOV AX, 00FF MOV CX,00FE IMUL CL [AL] = [CL] = Unsigned multiplication Signed multiplication [AX] = = 2 16 [AL] = [CL] = -2 10

MOV AL, 09 MOV CL, 08 MUL CL [AX] = 48 H AAM Adjust AL after multiplication Q(AL 10 ) / 10 AH R(AL 10 ) / 10 AL Affects all flags BCD Arithmetics [AX] = 0702 Result is unpacked BCD

Unsigned Division Format DIV S S is the source: R 8 or R 16, M 8 or M 16 Action Q([AX] / [S 8 ]) [AL] R([AX] / [S 8 ]) [AH] If Q is ≥ FF then type 0 interrupt occurs Q(([AX]:[DX]) / [S 16 ]) [AX] R(([DX]:[AX]) / [S 16 ]) [DX] If Q is ≥ FFFF then type 0 interrupt occurs Affects all flags

Signed Division Format IDIV S S is the source: R 8 or R 16, M 8 or M 16 Action Q([AX] / [S 8 ]) [AL] R([AX] / [S 8 ]) [AH] If Q is ≥ 7F then type 0 interrupt occurs Q(([AX]:[DX]) / [S 16 ]) [AX] R(([DX]:[AX]) / [S 16 ]) [DX] If Q is7FFF then type 0 interrupt occurs Affects all flags

AAD Adjust AX for division This instruction assumes that AH and AL contain unpacked DCD numbers MOV AX,0702 AAD Action: [AH] 10 * 10 + [AL] 10 [AL] 00 [AH] [AL] 10 [AL] 16 This instruction does the opposite of AAM

MOV AX, 314E 314E 16 = MOV BL, = IDIV BL quotient = quotient > or 7F 16 divide overflow MOV AX, = MOV BL,FD FD 16 = IDIV BL quotient in AL [AL] = = FB 16 residue in AH [AH] = 1 10 = 1 16

MOV AX, 3149 [AX] 10 = MOV BL,04 quotient = 3154 quotient > or FF 16 DIV BL divide overflow MOV AX, 314E 314E 16 = MOV BL, = DIV BL quotient in AL [AL] = = C5 16 residue in AH [AH] = = E 16

CBW convert byte to word Action most significant bit of AL all bits of AH does not affect any flag CWD convert word to double word Action most significant bit of AX all bits of DX does not affect any flag

MOV AL, 81 [AX] = CBW [AX] = FF81 16 CWD [DX] = FFFF 16 : [AX] = FF81 16

The Compare Instruction Format CMP D, S Effect Affects all flags Subtraction using 2’s complement MOV AH, 00 SAHF MOV AL, 99 [AL] = ve 2’s complement = = MOV BL, 1B [BL] = ve = ’s complement CMP AL, BL = – = OV, PL, NZ, AC, PE, NC Overflow, positive, not zero, auxiliary carry, parity even, no carry DS Register Memory Register Immediate MemoryImmediate AccumulatorImmediate

Flag Control Instructions MnemonicMeaningOperationFlags Affected LAHF Load AH from flags [AH] [flags] None SAHF Store AH into flags [flags] [AH] SF, ZF, AF, PF, CF CLC Clear Carry flag [CF] 0 CF STC Set Carry flag [CF] 1 CF CMC Complement carry flag [CF] CF CLI Clear Interrupt flag [IF] 0 IF STI Set Interrupt flag [IF] 0 IF

MOV AH, 00 SAHF MOV AX, 1234 [AX] = ve = MOV BX, 0ABCD [BX] = ve 2’s complement [BX] = CMP AX, BX = – ( ) No overflow, Auxiliary carry, Carry, Not zero, Positive, Odd parity NV AC CY PL NG PO SF CF PF AF ZF X X X

Logic Instructions No Flags [D] [D]NOT D All Flags[S] + [D] [D]XOR D,S All Flags[S] + [D] [D]OR D,S All Flags[S]. [D] [D]AND D,S Flags Affected OperationFormat immediate Acc immediate M R RM MR RR SD

MOV AX,0055 [AL] = = AND AL,1F [AL] = = OR AL,C [AL] = = D5 16 XOR AL,0F [AL] = = DA 1 NOT AL [AL] = = 25 16

Shift Instructions: SHL shift logical left format SHL D, Count Example: SHL AX,1 D Count register 1 CL memory 1 CL CF

SHR shift logical right format SHL R, Count Example: SHR AX,CL [CL] = 2 SAR AX,CL [CL] = CF D A CF

Rotate Instructions: ROL D, Count ROL AX, 1 CF ROR AX, CL [CL] = 4 CF 0

RCL D, Count RCL AX, CL [CL] = CF 0 Before execution [AX] = CF 1 After execution [AX] =

RCR D, Count RCR AX, CL [CL] = CF 0 Before execution [AX] = CF 0 After execution [AX] =