COMP 1321 Digital Infrastructure Richard Henson University of Worcester October 2012

Week 3: The Fetch-Execute Cycle n n Explain the instruction set of a typical CPU n n Understand the sequential way a CPU works, using its instruction set n n Understand how registers and memory addresses are used to process a CPU instruction and store the results

CPUs and the SAM n SAM designed to allow you to watch what happens when a CPU works n CPU very, very, very fast n Processes one instruction at a time n Instructions can require several cycles

What is “Processing”? n Usually calculations:  need data input »from register »from external memory  need to store output »from register »from external memory n Could also be a command without data

CPU types n Most frequently used:  Intel 8086 family  Motorola family  ARM (many mobile phones) n We’ll focus on Intel 8086 family  dates back to original IBM PC…

Registers n Tiny memory stores inside the CPU  usually containing one word of memory n Examples here show an 8-bit word (as used with original 8080 chip) n Typical registers:  general purpose data: AX, BX, CX, DX  specific use e.g. »program counter: instruction address in memory »stack pointer…

Data and Addressing n A general purpose register could contain  data  an address that points to data n Needs to be a way to distinguish between them  AX, 37 – move “37” into register  AX, [37] – move data contain in address 37 into register

8086 in practice n General Purpose registers 16-bit  Each gen register split into upper & lower byte AH AL BL BH CH DH CL DL AX BX CX DX upper byte lower byte

Fetch-Execute Cycle 1. Fetch instruction from memory 2. Decode the instruction and read any registers 3. Do any ALU operations (execute units) 5. Write back results to registers (Organization and Control) add ax, bx 4. Do any Memory Access ALU <- ax ALU <- bx ax + bx (Data cache) ax <- ALU None needed

add ax, bx add ax bx Fetch-Exec : State 1 Instruction Fetch AX BX

Fetch-Exec : State 2 Decode, Register Operations add ax, bx add axbx AX BX

Fetch-Exec : State 3 ALU Operation add ax, bx add axbx AX BX 3 1 4

Fetch-Exec : State 4 Memory Access add ax, bx add axbx AX BX 3 1 4

Fetch-Exec : State 5 Register Write add ax, bx add axbx BX

Fetch-Execute Cycle 1. Fetch instruction from memory 2. Decode the instruction and read any registers 3. Do any ALU operations (execute units) 5. Write back results to registers (Organization and Control) mov ax, [1] 4. Do any Memory Access Read the ‘1’ Put ‘1’ into MAR Data into ax Read memory at addr ‘1’

mov ax, [1] mov ax Fetch-Exec : State 1 Instruction Fetch

mov ax, [1] mov ax Fetch-Exec : State 2 Decode, Register Operations

mov ax, [1] mov ax Fetch-Exec : State 3 ALU Operation

mov ax, [1] mov ax Fetch-Exec : State 4 Memory Access

mov ax, [1] mov ax Fetch-Exec : State 5 Register Write

8088: Brains of the IBM PC

Inside the 8088 address bus address adder gen registers External buses ALU

Fetch 2.Decode 3.ALU 4.Mem Ops 5.Reg Write Pentium

So THAT’S how it all works! now you try it on SAM2… Next week: a focus on writing programs and i/o