Simulation Project Paper: Resolving the thermal challenges for

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Presentation transcript:

Simulation Project Paper: Resolving the thermal challenges for silicon microring resonator devices MyungJin Shin

Outline Paper Summary Simulation Target Device Structure Reducing Thermal Dependence Device Structure Simulation Result Additional Simulation (Heater Simulation) Conclusion

Resolution for Temperature Sensitivity Reduce thermal dependence (athermal devices) No additional active power Difficult to fabricate Laser source: fixed wavelength & laser stability throughout optical link Actively maintain local temperature (control based circuit) Typical control-based systems needed (heaters, PDs etc.) Additional active power consumption Laser source: no constraints are needed

Athermal Devices Main idea: decrease temperature-dependence of the microring resonator Negative thermo-optic coefficient(TOC) cladding Compensating thermal sensitivity by MZM

Simulation Goal & Principle Reduce temperature dependence using negative thermal-optic material Effective index of waveguide Γ: confinement factor for each materials

Using Negative Thermal-Optic Material 3 different negative TOC material Polymer material for cladding Temperature weakness, chemical instability Hard to fabricate on CMOS-production cycle Including photosensitive material with polymer to tune the TO after fabrication TiO2 for cladding material CMOS-compatible 2 different ways for temperature variation Changing room temperature Changing temperature by heater

Device Structure Waveguide width: 250nm ~ 450nm Waveguide height: 250nm Etch depth: 150nm ~250nm TiO2 oxygen content: 12% nTiO2: 2.42, TOC: -2.15 x 10-4/k Ref: Djordjevic SS, Shang K, Guan B, Cheung ST, Liao L, Basak J, Liu HF, Yoo SJ. CMOS-compatible, athermal silicon ring modulators clad with titanium dioxide. Opt Express 2013;21(12):1398-68.

MODE Solution Simulation New version of MODE Solution include n = nref + δn(t) Thermal dependent material is added (Si, SiO2, TiO2) Thermo-optic coefficient Si: 1.8 x10-4(/K) SiO2: 1x 10-5(/K) TiO2(O2_12%): -2.15x10-4(/K)

Comparison Between SiO2 & TiO2 Room Temperature: 300 ~310K (interval: 0.5K) Waveguide width: 250nm Etch depth: 200nm TiO2 Si SiO2 SiO2 cladding TiO2 cladding 1.34x10-4(/K) -4.5x10-5(/K)

Different Etch Depth Waveguide width: 250nm Etch depth ↑  Γcore ↓ Etch depth: 150nm Etch depth: 200nm Etch depth: 250nm

Different Waveguide Width Etch depth: 200nm Waveguide width ↑  Γcore ↑ Width: 250nm Width: 300nm Width: 350nm

Heater Simulation Workflow

Temperature Distribution 300K ~ 310K (0.5K interval) at waveguide 2μm

Temperature Imported MODE Solution Waveguide width: 250nm Etch depth: 200nm 300K ~ 310K (0.5K interval) at waveguide Upper cladding experience higher temperature variation compare to WG  negative TiO2 TOC affects more than Si TOC

Summary Effective index variation is simulated with TiO2 cladding Effective index variation is decided by TOC & Γ for each core & cladding Optimized athermal waveguide with TiO2 (12% O2) cladding Waveguide width: 300nm Etch depth: 200nm Location of heater can affect temperature dependence of effective index

Simulation Project Paper: Resolving the thermal challenges for silicon microring resonator devices Slayier55@gmail.com