Sophie BARON, PH-ESSLEADE, 15/06/06 1 TTC upgrade Status May 2006  Overview  AB/RF optical links  Receiver crate  Status and schedules  Documentation.

Slides:



Advertisements
Similar presentations
GCT Source Card Status John Jones Imperial College London
Advertisements

01/11/2002SNS Software Final Design Review1 V123S Event Link Encoder, Transmission System and PLL Receiver Thomas M. Kerner (BNL) SNS Global Controls.
TileCal Electronics A Status Report J. Pilcher 17-Sept-1998.
The LAr ROD Project and Online Activities Arno Straessner and Alain, Daniel, Annie, Manuel, Imma, Eric, Jean-Pierre,... Journée de réflexion du DPNC Centre.
20 Feb 2002Readout electronics1 Status of the readout design Paul Dauncey Imperial College Outline: Basic concept Features of proposal VFE interface issues.
6 June 2002UK/HCAL common issues1 Paul Dauncey Imperial College Outline: UK commitments Trigger issues DAQ issues Readout electronics issues Many more.
Large Area, High Speed Photo-detectors Readout Jean-Francois Genat + On behalf and with the help of Herve Grabas +, Samuel Meehan +, Eric Oberla +, Fukun.
Ionization Profile Monitor Front End (IFE) System Presenter: Kwame Bowie PPD/EED Phone: (630)
Status of LAV FEE electronics G. Corradi, C. Paglia, D. Tagnani & M. Raggi, T. Spadaro, P. Valente.
BST use in experiments Feedback from ALICE, ATLAS, CMS, LHCb Sophie Baron, BI-TB on BST17 october
ATLAS SCT/Pixel TIM FDR/PRR 28 July 2004 Interfaces to ROD Crate Components - Matt Warren1 Physics & Astronomy HEP Electronics Matthew Warren John Lane,
INTRODUCE OF SINAP TIMING SYSTEM
Overview of SINAP Timing System Electronics Group Beam Diagnostics & Control Division SINAP.
Electronics for PS and LHC transformers Grzegorz Kasprowicz Supervisor: David Belohrad AB-BDI-PI Technical student report.
P. Jansweijer Nikhef Amsterdam Electronics- Technology October 15, 20091VLVnT-09 Athens Measuring propagation delay over a coded serial communication channel.
DLS Digital Controller Tony Dobbing Head of Power Supplies Group.
F.F. - 18/07/ User Guide of the Input Trigger Multiplexer unit with input signal rate counters.
Prototype Test of SPring-8 FADC Module Da-Shung Su Wen-Chen Chang 02/07/2002.
SODA: Synchronization Of Data Acquisition I.Konorov  Requirements  Architecture  System components  Performance  Conclusions and outlook PANDA FE-DAQ.
Status of Data Exchange Implementation in ALICE David Evans LEADE 26 th March 2007.
Sophie BaronTTC1 TTC status February 2005 ATLAS electronics.
Status of the Beam Phase and Intensity Monitor for LHCb Richard Jacobsson Zbigniew Guzik Federico Alessio TFC Team: Motivation Aims Overview of the board.
LNL 1 SLOW CONTROLS FOR CMS DRIFT TUBE CHAMBERS M. Bellato, L. Castellani INFN Sezione di Padova.
BI day 2011 T Bogey CERN BE/BI. Overview to the TTpos system Proposed technical solution Performance of the system Lab test Beam test Planning for 2012.
Sophie BARON, PH-ESSLEADE - 07 Nov  TTC system status reminder  Upgrade principle  [Some] details about the infrastructure  Practical implementation.
CMX status and plans Yuri Ermoline for the MSU group Level-1 Calorimeter Trigger Joint Meeting CERN, October 2012,
02/02/ S. Baron RF-Experiments Timing Meeting - Feb RF CMS ATLAS ALICE LHCb BTPX Status.
Rome 4 Sep 04. Status of the Readout Electronics for the HMPID ALICE Jose C. DA SILVA ALICE.
Status and planning of the CMX Wojtek Fedorko for the MSU group TDAQ Week, CERN April , 2012.
TTCrx Issues M.Matveev Rice University December 17, 2009.
JgimenoIWM-12/1/2004 Fiber Optic module 1 STUDIES AND DEVELOPMENT OF A FIRST FIBER OPTIC MODULE PROTOTYPE Javier Gimeno Vicente.
Acquisition Crate Design BI Technical Board 26 August 2011 Beam Loss Monitoring Section William Vigano’ 26 August
FPGA firmware of DC5 FEE. Outline List of issue Data loss issue Command error issue (DCM to FEM) Command lost issue (PC with USB connection to GANDALF)
Digital CFEB (an Update) B. Bylsma, EMU at CMS Week, March 16, Ben Bylsma The Ohio State University.
Beam Line BPM Filter Module Nathan Eddy May 31, 2005.
28 June 2004ATLAS Pixel/SCT TIM FDR/PRR1 TIM tests with ROD Crate John Hill.
TTC for NA62 Marian Krivda 1), Cristina Lazzeroni 1), Roman Lietava 1)2) 1) University of Birmingham, UK 2) Comenius University, Bratislava, Slovakia 3/1/20101.
1 The Link-On-Chip (LOC) Project at SMU 1.Overview. 2.Status 3.Current work on LOCs6. 4.Plan and summary Jingbo Ye Department of Physics SMU Dallas, Texas.
HIE REX / ISOLDE New Instrumentation electronics - Main functionalities - S.Burger BI-PM
Work Review Angel Monera Martinez. Index Objectives Time Frame Analog Link  Analog Requirements  Miteq Characterization and tests Digital Link  Requirements.
VME64x Digital Acquisition Board (TRIUMF-DAB) Designed to handle 2 channels of 12-bit 40MHz Data Will be used for both the LTI & LHC beam position system.
Bunch Numbering P. Baudrenghien AB/RF for the LHC/RF team.
Task List  Group management plan  Background studies  Link budget: optical/electrical  Build, test learning Rx board  Order components for transceiver.
ATLAS SCT/Pixel TIM FDR/PRR28 June 2004 TIM Requirements - John Lane1 ATLAS SCT/Pixel TIM FDR/PRR 28 June 2004 Physics & Astronomy HEP Electronics John.
29 May 2009 Henk Boterenbrood, Augusto Ceccucci, Bjorn Hallgren, Mauro Piccini and Helmut Wendler 1 The Calorimeter Recorder CARE.
Mai 31th 2011 Christophe Beigbeder PID meeting1 ETD meeting Test setup : Activities in Bari, Univ of Maryland and at Orsay Test setup : Activities in Bari,
DHH Status Igor Konorov TUM, Physics Department, E18 PXD DAQ workshop Münzenberg –June 9-10, 2011.
RF Commissioning D. Jacquet and M. Gruwé. November 8 th 2007D. Jacquet and M. Gruwé2 RF systems in a few words (I) A transverse dampers system ACCELERATING.
The Clock Distribution inside the CTA Camera Axel Kretzschmann, DESY Zeuthen,
Work on Muon System TDR - in progress Word -> Latex ?
Interesting use-cases
RF-TTC Joint News LEADE, June 2008
Status of the Beam Phase and Intensity Monitor for LHCb
TTC UPGRADE FOLLOW-UP Sophie Baron, Angel Monera Martinez LECC 2006
A New Clock Distribution/Topology Processor Module for KOTO (CDT)
MICE AFEIIt Timing and Triggering
ATLAS Local Trigger Processor
Old ROD + new BOC design plans
TTC System Status May 2007 System overview Production Status
TTC system for FP420 reference timing?
Christophe Beigbeder PID meeting
Strategy for long-term support of the TTC system
TTC Information Meeting
Combiner functionalities
CMX Status and News - post PRR -
Interesting use-cases
LHC Fast Timing Commissioning
HallD Collaboration Meeting Jefferson Lab December 11-13, 2003
TTC news December 04 Sophie Baron TTC.
Beam instrumentation and background monitoring
Presentation transcript:

Sophie BARON, PH-ESSLEADE, 15/06/06 1 TTC upgrade Status May 2006  Overview  AB/RF optical links  Receiver crate  Status and schedules  Documentation

Sophie BARON, PH-ESSLEADE, 15/06/06 2  Overview  AB/RF optical links  Receiver crate  Status and schedules  Documentation

Sophie BARON, PH-ESSLEADE, 15/06/06 3 OVERVIEW TTClab (build 4) AB/RF Tx and Rx modules TTC Receiver Crates Optical fibres

Sophie BARON, PH-ESSLEADE, 15/06/06 4  Overview  AB/RF optical links  Receiver crate  Status and schedules  Documentation

Sophie BARON, PH-ESSLEADE, 15/06/06 5 AB/RF OPTICAL LINKS [Analog solution]  Analog Modules oTransmitter module: RF_Tx_A (EDA-01331)RF_Tx_A oReceiver module: RF_Rx_A (EDA-01332)RF_Rx_A  6U 4TE VME (VME 64x and VME 64 compatible) o3 internal registers Power warning led threshold (RW) CH/2 1Power monitoring (Read Only)  Miteq links 3GHz ovalidated - Specs:Specs Measured Phase Noise: –400MHz -> 0.4ps (pkpk) –40MHz -> 0.4ps (pkpk) –10MHz -> 13ps (pkpk) More results in the evaluation reportevaluation report Typical output levels: –Bunch Clock = 0dBm continuous sinewave –Orbit = 1Vpk pulse on 50 Ohms Quantities: –10 links have been ordered in November05 –10 to be ordered soon => Enough to work until 2007

Sophie BARON, PH-ESSLEADE, 15/06/06 6 AB/RF OPTICAL LINKS [Analog solution] 3200 € 2000 € 150 €

Sophie BARON, PH-ESSLEADE, 15/06/06 7 RECEIVER CRATE [Digital Solution]  We tried to find a cheaper solution with the same form factor  Digital Modules (RF_Tx_D and RF_Rx_D) oFirst test boards made with PHOTON 155Mbps/TRR-1B43 pair Standard modules of the TTC modules Performance evaluated on the same setup than the analog links Results available in the test reporttest report AB/RF agreed that this could be a cheaper solution for 70% of the links, including the TTC If the final results are as good as expected, they will use this solution for these 70% and maintain the boards the same way. oOptical components identified and ordered Photon getting obsoletePhoton OCP components pin compatible componentsOCP components Price: –Orbit, 10MHz, 40MHz: 156Mbps links –400MHz: 1.2Gbps oDesign on-going (PH/ESS). Close to the analog boards, but higher density. TxRx 156Mbps PHOTON Mbps AMS Gbps AMS635295

Sophie BARON, PH-ESSLEADE, 15/06/06 8  Overview  AB/RF optical links  Receiver crate  Status and schedules  Documentation

Sophie BARON, PH-ESSLEADE, 15/06/06 9 RECEIVER CRATE [Overview] o6U VME crate: oVME Crate controller oAB/RF receiver VME modules oRF2TTC VME module Receives timing signals from the AB/RF modules and machine states from the BST optical link oBC and Orbit fanout

Sophie BARON, PH-ESSLEADE, 15/06/06 10 RECEIVER CRATE [Crates – Power Supplies - Controllers]  Provided by PH/ESS  Common Crates: o1 LHC standard 6U VME 64x crate per experiment oAvailable  (less) Common Power supplies: o(+3.3V/100A, +5V/100A, +-12V/10A, 48V/12A) oATLAS, CMS, LHCb: OP oALICE: OP  (no) Common Controllers: oALICE: Standard VP315/317 from CCT oATLAS, TTC lab: Standard VP110 from CCT oCMS: CAEN PCI-controller card A V2718 VME-PCI optical bridge oLHCb:CAEN V1718 VME-USB bridge oPOOL items. One of each will be reserved as from August 06.

Sophie BARON, PH-ESSLEADE, 15/06/06 11 RECEIVER CRATE [TTC Clock fanout]  TTC Clock fanout ( EDA V1, PH/MIC) TTC Clock fanout oDual 1:18 ECL fanout o4 NIM outputs per input (ALICE requirement) o1 status led per input (presence of clock). oMaximum density oThe 2 dual modules can be daisy chained. oFully AC coupled Prototype produced and debugged  Power: 5V-5A,  Jitter: In/Out skew=8ps rms, Cy2Cy=11ps rms  Skew between outputs: a few ps Production will begin after full validation & design modifications

Sophie BARON, PH-ESSLEADE, 15/06/06 12 RECEIVER CRATE [RF2TTC overview]  VME64x - 6U – 4TE module  Inputs o3 BC inputs (BC1, BC2, BCref) (RF signals) o2 Orbit inputs (Orb1, Orb2) (RF signals) o1 Optical input for the BST signals  Outputs o4 ECL BC outputs (BC1, BC2, BCref, MainBC) AC coupled 4 NIM copies o3 NECL Orbit outputs (Orb1, Orb2, MainOrb) DC coupled Synchronised respectively to BC1, BC2, MainBC 3 NIM copies  Status leds

Sophie BARON, PH-ESSLEADE, 15/06/06 13 RECEIVER CRATE [RF2TTC functionalities]  Adjustable parameters (via VME registers) oBC1, BC2, BCref, MainBC Adjustable level on the comparator input (BC1, BC2 and BCref) Multiplexing between each input and the internal MHz clock Adjustable phase shift (steps of 0.5ns) oOrbit1, Orbit2, Main Orbit Adjustable level on the comparator input to match various types of signals (Orb1 and 2) Adjustable phase shift before the latching with the corresponding BC (Orb1 and 2) Multiplexing between each input and an internal counter Adjustable length, coarse delay (steps of 25ns), phase shift (steps of 0.5ns) before the output  Status control oStatus registers (locking BC, BST ready, machine modes, Orbit alignment) oLeds  Manual or automatic mode to switch between the internal clock (orbit) and one of the machine clock (orbit) time injection ~15 min ramping ~28 min squeeze ~15 min physics ~10-20 H Beam Dump E(450Ge V -> 7TeV) Beam Dump E(450Ge V -> 7TeV)

Sophie BARON, PH-ESSLEADE, 15/06/06 14 RECEIVER CRATE [RF2TTC block diagram] Adjustable Reset possible Monitored via a VME register Status Led

Sophie BARON, PH-ESSLEADE, 15/06/06 15  Overview  AB/RF optical links  Receiver crate  Status and schedules  Documentation

Sophie BARON, PH-ESSLEADE, 15/06/06 16 STATUS & Schedules ModulesSpecsComponent choiceSchematicsReviewlayoutFirmwareSoftwareComponents orderingPrototypeValidationProduction AB/RFmodules Analog Tx and Rx NOW JUNE- SEPT (test beam) Oct Digital Tx and Rx NOW ReceiverCrate AUG- SEPT (test beam) Power Supply Controller FanoutJuly RF2TTCNOW 3Weeks NOW 2Months NOW 2Months NOW 6 Weeks Mid JULY Oct

Sophie BARON, PH-ESSLEADE, 15/06/06 17  Overview  AB/RF optical links  Receiver crate  Status and schedules  Documentation

Sophie BARON, PH-ESSLEADE, 15/06/06 18 DOCUMENTATION  TTC upgrade proposal on EDMS  TTC upgrade site  RF2TTC Review on INDICO/Projects/TTC