AIDA ASIC Davide Braga Steve Thomas ASIC Design Group 14 October 2010.

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Presentation transcript:

AIDA ASIC Davide Braga Steve Thomas ASIC Design Group 14 October 2010

2 Input comparator: Now that the original diodes have been replaced by diode-connected pass transistors (not as fast or low impedance) the active-link circuit must take most of the input current. To avoid the build up of a large input voltage now that the passive link is slower, the active link must respond faster Necessary to optimize the input comparator

14 October Input comparator speed Vin (d=100ns) -with input diode-connected transistors -without Vin (d=200ns) no significant difference between the two, the diode- connected transistors don’t conduce Vin (d=300ns) 6.7ns13ns New comparator: appreciably faster across all corners old comparator NB: speed function of input voltage. In this simulation Vin=Vt hreshold ±100mV, t rise =t fall =10ns 5.5ns3.3ns -80%~ -50%

14 October High ref, Qin=900pC (~18GeV) (1): link charge (d=100ns-200ns-300ns) Q_input Q_HEC Q_input Q_HEC Q_input Q_HEC LEC charge

14 October High ref, Qin=900pC (~18GeV) (2): link charge (detail) (d=100ns-200ns-300ns) Q_input Q_HEC Q_input Q_HEC Q_input Q_HEC

14 October new comp old comp new comp old comp new comp old comp High ref, Qin=900pC (~18GeV) (3): The new comparator is generally faster and loses less charge for very fast inputs

14 October old comp new comp High ref, Qin=900pC (~18GeV) (4): Significant improvement for slower signals too. (NB: old and new configurations in these presentation have the same link, the only difference is the input comparator) d=100ns d=200ns d=300ns

14 October Low ref, Qin=900pC (~18GeV) (1): Q_input Q_HEC_new Q_HEC_old Q_HEC_new Q_HEC_old Q_HEC_new Q_HEC_old

14 October Low ref, Qin=900pC (~18GeV) (2): new old new old new old Vin

14 October Low ref, Qin=900pC (~18GeV) (3): new old new old new old Vin

14 October Low ref, Qin=900pC (~18GeV) (3): new old new old new old Current: fast (~ns) feature, total current comparable (NB: absolute value in this graph due to ancillary circuits in the schematic)

14 October Link leakage current: [pA] [fA] low_ref (0.4V), comparator thresh=0.35V high_ref (1.6V), comparator thresh=1.65V T= -10°C ÷ +50°C Vdd= 3.0V ÷ 3.6V V offset_preAmps =±1.2mV Sample of the current through the HEC/LEC link for high-low input references, different process corners. The concern was that a possible offset between the amplifiers’ references could cause significant current. The current is <30 pA in the worst case so it will be easily handled by the feedback compensation circuit

14 October