22 Sept 20091 A slight reformulation of (ALCT) muonic timing… In terms of brass tacks.

Slides:



Advertisements
Similar presentations
Cognitive Computing: 2012 Consciousness and Computation: computing machinery & intelligence 3. EMULATION Mark Bishop.
Advertisements

1 MA 1128: Lecture 19 – 4/19/11 Quadratic Formula Solving Equations with Graphs.
Andrey Korytov July 2, Data Quality TB 2004 Andrey Korytov.
24 April 2007G. Rakness (UCLA) 1 Power cuts at Green Barracks/SX5 False fire alarms from the central fire alarm system (incendie central) cut power to.
22 May 2007G. Rakness (UCLA) 1 At minus-side slice test… Complete description of how to bring back slice test all the way from (power=off) to (local run=physics.
CPT Week, Nov 2003, B. Paul Padley, Rice University1 CSC Trigger Status, MPC and Sorter B. Paul Padley Rice University November 2003.
Factoring a Quadratic Expression
CSC1016 Coursework Clarification Derek Mortimer March 2010.
TMB-RAT Software Update USCMS Slice Test Rice University August 16, 2004 Martin Von der Mey / Yangheng Zheng* University of California, Los.
US Test Beam Results Of Front End Timing T. Ferguson, N. Terentiev* (Carnegie Mellon University) CMS EMU Meeting University of California, Davis Feb 25.
CSC Synchronization Procedure and Plans CMS Endcap Muon FNAL October 29, 2004 Jay Hauser* / Martin Von der Mey / Yangheng Zheng University of.
EELE 461/561 – Digital System Design Module #6 Page 1 EELE 461/561 – Digital System Design Module #6 – Differential Signaling Topics 1.Differential and.
Computer Programming and Basic Software Engineering 4. Basic Software Engineering 1 Writing a Good Program 4. Basic Software Engineering 3 October 2007.
Endcap Muon meeting: CMU, Oct 19, 2003 J. Hauser UCLA 1 CSC Trigger Primitives Test Beam Studies Main Test Beam 2003 Goals: Verify the peripheral crate.
Microprocessors Introduction to ia64 Architecture Jan 31st, 2002 General Principles.
DRAFT version Oct. 15, 2004 Hauser/Mey UCLA 1 Analysis of Oct. 04 Test Beam RPC Data Jay Hauser, Martin von der Mey University of California Los Angeles.
Microprocessors Frame Pointers and the use of the –fomit-frame-pointer switch Feb 25th, 2002.
Preliminary Results from Structured Beam Test CMS Trigger Meeting June 3, 2003 Brian Mohr UCLA Dept. of Physics.
DRAFT version Oct. 15, 2004 Hauser/Mey UCLA 1 Analysis of Oct. 04 Test Beam RPC Data Jay Hauser, Martin von der Mey University of California Los Angeles.
Gateway Quiz Reminders: The next Gateway will be given in class next week or the week after )check your course calendar.) Before then, each student who.
Which one of these answers is correct? Prove your answer!
College Algebra Prerequisite Topics Review
Any questions on today’s homework? (Sections 1.6/1.7) Reminder: You should be doing this homework without using a calculator, because calculators can’t.
20 Oct 2009G. Rakness (UCLA)1 Powering on… Last week: CMS off to give evaporation time to dry out the experiment Monday – Tuesday: Began powering on CSCs.
Lesson 8-1 Negative & Zero. Your Goal: Simplify expressions containing integer exponents.
The Binomial Distribution © Christine Crisp “Teach A Level Maths” Statistics 1.
15 Sept 2009G. Rakness (UCLA)1 Paper progress On the Analysis Review Committee for the paper: “Performance of the CMS Cathode Strip Chambers with Cosmic.
13 March 2007G. Rakness (UCLA) 1 Minus side slice test status Greg Rakness University of California, Los Angeles UCLA phone meeting 13 March 2007.
Methods and Solving Equations
Testing and Debugging Version 1.0. All kinds of things can go wrong when you are developing a program. The compiler discovers syntax errors in your code.
Track-Finder Trigger at the Beam Test Results and Features Darin Acosta, Rick Cavanaugh, Victor Golovtsov, Lindsey Gray, Khristian Kotov, Alex Madorsky,
CSC Synchronization documentation Step-by-step procedure to… – Read out a chamber – Synchronize triggers from many chambers (and read out data) Description.
Various Wrote Run Coordination job description – Found this exercise to be useful as CSC Operations guy, so decided to do it as Deputy Run Coordinator…
Week 8 - Wednesday.  What did we talk about last time?  Level order traversal  BST delete  2-3 trees.
10/06/09 UCLA Meeting Hauser 1/14 really Various updates Update on LHC schedule: Beam to Alice starts ~Oct. 24. Not all sectors are cold. Circulating beam.
4 Dec 2008G. Rakness (UCLA)1 Online Software Updates and RPC data in the RAT …including Pad Bit Mapping and Efficiency… Greg Rakness University of California,
Hamming Code,Decoders and D,T-flip flops Prof. Sin-Min Lee Department of Computer Science.
Any questions on today’s homework? (Sections 1.6/1.7) Reminder: You should be doing this homework without using a calculator, because calculators can’t.
CMS Latency Review, 13th March 2007CSC Trigger 1 Latency and Synchronization update.
This presentation will attempt to guide you through the information needed to solving harder equations of the type ax 2 + bx + c = 0 When you get to the.
CSC High Pileup Sumulations Vadim Khotilovich Alexei Safonov Texas A&M University June 15, 2009.
Gateway Quiz Reminders: The next Gateway will be given in class next week (check your course calendar.) Before then, each student who did not score 8/8.
PNPI / University of Florida Checking PC Timing Lev Uvarov CSC Time Synchronization Meeting May 12, 2009.
3 Nov 2009G. Rakness (UCLA)1 Weekend of 24 – 25 October Loaded all TMB firmware –Version 15 Oct 2009 XML file created using Jay’s muonic timing constants.
US AFEB timing in CSCs in splash events, run N. Terentiev, CMU CSC Synchronization meeting Nov. 16, 2009, CERN.
Recall: CFEB inefficiencies Collision Run June 2010G. Rakness (UCLA)1 validation/run135445/ExpressPhysics/Site/PNGS/hORecHits.png.
UCLA Group Meeting March 20, 2014 Andrew Peck Shayan Rastegari 1 Updates from Lab Andrew Peck & Shayan Rastegari March 20, 2014.
Warm-up Simplify (-14)
AVCE ICT – Unit 7 - Programming Session 12 - Debugging.
Gateway Quiz #1 Results: Average class score: xx.x% Number of students who passed: x (Passing the Gateway requires a perfect score of 8/8, and very few.
10/20/09 UCLA Meeting Hauser 1/9 Various updates Update on LHC/CMS schedule: First shots into collimator: Nov. 7 and 8! Circulating beam ~Nov. 18, less.
Sequence diagrams Lecture 5. Main terms  Interaction  Life line  Activation  Executable behavior and derived behavior  Messages  Trajectory  Frame.
CMS Week, 3-7 November CSC Trigger Test Beam Report Cast of many.
6 April 2007G. Rakness (UCLA) 1 CSC runs at minus side slice test 27 Mar – 5 Apr Color scheme: Successes Problems/questions Greg Rakness University.
Update on “Muonic Timing” of CSC Electronics
Any questions on today’s homework. (Sections 1. 6/1
904 Status Recall last Group Meeting…
Timing/Synchronization Status
CSC Synchronization Procedure and Plans
“Golden” Local Run: Trigger rate = 28Hz
Cabling Lengths and Timing
Gateway Quiz Reminders:
September CSC Beam Test Report
CSC Trigger Primitives Test Beam Studies
Instructor: Shengyu Zhang
Analysis of Oct. 04 Test Beam RPC Data
University of California Los Angeles
Changes in Level 1 CSC Trigger in ORCA by Jason Mumford and Slava Valuev University of California Los Angeles June 11,
Configuring the Peripheral Crates
Global Trigger Finds Correct BX
Presentation transcript:

22 Sept A slight reformulation of (ALCT) muonic timing… In terms of brass tacks

22 Sept Signal leaving TMB Signal returning to TMB TX 1 integer delay tx 1 fine delay S 1 cable propagation rx 1 fine delay RX 1 integer delay TX 2 integer delay tx 2 fine delay S 2 cable propagation rx 2 fine delay RX 2 integer delay CSC #1 CSC #2  time (bx) This is a simplified version of Jay’s timing diagram for the BC0 signal propagating from the TMB to the ALCT and back to the TMB for 2 different chambers Signal at ALCT #1 Signal at ALCT #2

22 Sept Signal leaving TMB Signal returning to TMB TX 1 integer delay tx 1 fine delay S 1 cable propagation rx 1 fine delay RX 1 integer delay TX 2 integer delay tx 2 fine delay S 2 cable propagation rx 2 fine delay RX 2 integer delay CSC #1 CSC #2  time (bx) My understanding of muonic timing is that this time should be constant for all chambers, regardless of tx N + TX N Signal at ALCT #1 Signal at ALCT #2

22 Sept Signal leaving TMB Signal returning to TMB TX 1 integer delay tx 1 fine delay S 1 cable propagation rx 1 fine delay RX 1 integer delay TX 2 integer delay tx 2 fine delay S 2 cable propagation rx 2 fine delay RX 2 integer delay CSC #1 CSC #2  time (bx) TX, tx are (calculated) input values rx is determined for each value of TX, tx (its value does not matter, it simply makes sure latching happens) RX is the delay parameter to scan to equalize times from TMB back to TMB for all chambers… Signal at ALCT #1 Signal at ALCT #2

22 Sept Signal leaving TMB Signal returning to TMB TX 1 alct_txd_int_delay tx 1 alct_tof_delay S1S1 S1S1 RX 1 alct_bx0_delay TX 2 alct_txd_int_delay tx 2 alct_tof_delay S2S2 S2S2 RX 2 alct_bx0_delay CSC #1 CSC #2  time (bx) TX, tx are (calculated) input values absorb rx into S2, since that’s its net effect (similar thing for tx_clock_delay) RX is the delay parameter to scan to equalize times from TMB back to TMB for all chambers… Signal at ALCT #1 Signal at ALCT #2

22 Sept Signal leaving TMB Signal returning to TMB TX 1 alct_txd_int_delay tx 1 alct_tof_delay S1S1 S1S1 RX 1 alct_bx0_delay CSC #1  time (bx) To define T… Use the feature that TMB has TWO BC0 signals 1.CLCT_BC0 (local to TMB) 2.ALCT_BC0 (takes the path on the left)  There is an xml parameter called tmb_bxn_offset which sets the value of CLCT_BC0 when TMB receives the BC0 signal from CCB… When ALCT_BC0 and CLCT_BC0 are synchronized at the bottom of the page, then… 3564 – tmb_bxn_offset = T (3563 is the maximum value of BXN) Signal at ALCT #1 T

22 Sept Scan over input delays for a given T With clct_bx0_delay = 15 With tmb_bxn_offset = 3550 Scanning from 0 to 16 alct_txd_int_delay[0] = 0 alct_txd_int_delay[1] = 0 alct_txd_int_delay[2] = 0 alct_txd_int_delay[3] = 0 alct_txd_int_delay[4] = 0 alct_txd_int_delay[5] = 0 alct_txd_int_delay[6] = 0 alct_txd_int_delay[7] = 0 alct_txd_int_delay[8] = 0 alct_txd_int_delay[9] = 0 alct_txd_int_delay[10] = 0 alct_txd_int_delay[11] = 0 alct_txd_int_delay[12] = 0 alct_txd_int_delay[13] = 0 alct_txd_int_delay[14] = 100 alct_txd_int_delay[15] = 0  Best value is alct_txd_int_delay = 14 This is just to prove that such a scan can be done at 904. The actual scan should scan over alct_bx0_delay. In addition, I would argue that clct_bx0_delay is never needed (given tmb_bxn_offset)

22 Sept Muonic Timing-in Procedure - Main Steps 1. Get good communication with ALCT n Leave TOF delays at current, “arbitrary” values. Or perhaps 0? 2. Align all of the BC0’s returning from ALCTs 3. Implement calculated TOF delays for ALCTs 4. Implement calculated TOF delays for CLCTs and establish good CFEB  TMB data transmission 5. Check ALCT-CLCT time matching n This should work, regardless of CSC data source (cosmics, beam, etc.) 6. Check SP alignment of LCTs (“Dayong” procedure) n This will check out perfectly if the TOF delays have been properly calculated given the exact trigger conditions (From Jay’s talk last week…)

22 Sept Muonic Timing-in Procedure - Main Steps with ALCT 1.For ALL chambers set nalct_tof_delay=0 nalct_txdata_int_delay=0 ntmb_bxn_offset = value such that the shortest TMB- ALCT cable requires alct_bx0_delay=15 2.Get good TMB  ALCT communication nDetermine alct_[rx,tx]_clock_delay, alct_[rx,tx]_posneg 3.Align all of the BC0’s returning from ALCTs nDetermine alct_bx0_delay to set T 4.Implement calculated TOF delays for ALCTs 5.Remeasure 2. and 3., preserving T

22 Sept Essential differences between muonic timing and current timing (1) Currently: afeb_fine_delay used for sub- bx timing changes in trigger data –These values should go back to FAST site values (i.e., to correct for different AFEB- ALCT cable delays) Currently: mpc_tx_delay used for bx timing changes in trigger data –These values should go to 0 for all TMB’s

22 Sept Essential differences between muonic timing and current timing (2) Currently: match_trig_alct_delay (alct_delay) = 8 for all TMB’s –These values must change corresponding to the changes in alct_bx0_delay. This is needed to keep ALCT data in sync with ALCT_BC0… match_trig_alct_delay delays all ALCT data except ALCT_BC0 alct_bx0_delay delays ALCT_BC0

22 Sept Essential differences between muonic timing and current timing (3) What if the alignment of LCTs from different chambers for the same muon is wrong at the SP (“Dayong’s” procedure)? We will need to… –Implement the negative correction in alct_tof_delay –Redo the communication and BC0 alignment for this chamber  BC0 signals are always synchronized all the way to the SP by construction… What will happen to the BXN attached to this muon? Will it be off by the same amount? In other words, will a distribution of absolute bxn give the same result as Dayong’s procedure?

22 Sept ALCT BXN at the ALCT The timing of ALCT_BC0 is fixed There is a parameter alct_bxn_offset, but it only affects the bxn labeling of the data  The data for the muon whose trigger info is labeled with ALCT_BC0 and sent to TMB has BXN=alct_bxn_offset I believe this is not the right thing to do. I asked Alex and Lev if they didn’t think it should be done with an offset (e.g., as it is done in TMB)  No answer yet… But actually, thinking about it more, I think it might be better done with a BC0 offset implemented in the TTCci Thoughts? At the moment, at the ALCT…

22 Sept To do Put in the code for ALCT as on page 9 Think about CFEB muonic timing –This is the critical path for the muon trigger latency, do we want to add delay to this path? It might not matter as long as we don’t add delay to the whole system…