VGA Interface1 trend toward higher levels of integration Evolution of implementation technologies zLogic gates (1950s-60s) zRegular structures for two-level.

Slides:

Advertisements

Similar presentations

ECE 506 Reconfigurable Computing Lecture 2 Reconfigurable Architectures Ali Akoglu.

Advertisements

FPGA (Field Programmable Gate Array)

Marco D. Santambrogio FPGA: What? Why? Marco D. Santambrogio

CS Fall 2005 – Lec. #3: Programmable Logic - 1 Programmable Logic zRegular logic yProgrammable Logic Arrays yMultiplexers/Decoders yROMs zField Programmable.

Programmable Logic Devices

1 Programmable Logic. 2 Prgrammable Logic Organization Pre-fabricated building block of many AND/OR gates (or NOR, NAND) "Personalized" by making or breaking.

Programmable Logic Devices

ECE 3110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices Programmable Logic Devices.

FPGA-Based System Design: Chapter 3 Copyright  2004 Prentice Hall PTR SRAM-based FPGA n SRAM-based LE –Registers in logic elements –LUT-based logic element.

PLD Technology Basics. Basic PAL Architecture DQ Q CLK OE Fuse.

Xilinx FPGAs - 1 trend toward higher levels of integration Evolution of Implementation Technologies zDiscrete devices: relays, transistors (1940s-50s)

Lecture 2: Field Programmable Gate Arrays I September 5, 2013 ECE 636 Reconfigurable Computing Lecture 2 Field Programmable Gate Arrays I.

ENGN3213: Digital Systems and Microprocessors L#8 1 Lecture 8 Overview Review of Combinational Logic Technologies Logic Implementation Programmable Logic.

ENGIN112 L38: Programmable Logic December 5, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 38 Programmable Logic.

CS 150 – Fall Lec #27: FPGA Evolution – 1 trend toward higher levels of integration Evolution of Implementation Technologies zDiscrete devices:

The Spartan 3e FPGA. CS/EE 3710 The Spartan 3e FPGA  What’s inside the chip? How does it implement random logic? What other features can you use?  What.

Xilinx FPGAs - 1 trend toward higher levels of integration Evolution of Implementation Technologies zDiscrete devices: relays, transistors (1940s-50s)

Evolution of implementation technologies

Programmable logic and FPGA

LabVIEW Design of Digital Integrated Circuits FPGA IC Implantation.

Multiplexers, Decoders, and Programmable Logic Devices

ECE 331 – Digital System Design Tristate Buffers, Read-Only Memories and Programmable Logic Devices (Lecture #16) The slides included herein were taken.

Physical Implementation 1)Manufactured Integrated Circuit (IC) Technologies 2)Programmable IC Technology 3)Other Technologies Manufactured IC Technologies.

CS 151 Digital Systems Design Lecture 38 Programmable Logic.

Introduction to FPGA and DSPs Joe College, Chris Doyle, Ann Marie Rynning.

Introduction to FPGA’s FPGA (Field Programmable Gate Array) –ASIC chips provide the highest performance, but can only perform the function they were designed.

Dr. Konstantinos Tatas ACOE201 – Computer Architecture I – Laboratory Exercises Background and Introduction.

Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. Terms of Use (Hyperlinks are active in View Show mode) Terms of Use Lecture 13 – Programmable.

05/12/06BR Fall 991 Programmable Logic So far, have only talked about PALs (see 22V10 figure next page). What is the next step in the evolution of PLDs?

CSET 4650 Field Programmable Logic Devices

EGRE 427 Advanced Digital Design Figures from Application-Specific Integrated Circuits, Michael John Sebastian Smith, Addison Wesley, 1997 Chapter 7 Programmable.

Lecture 2: Field Programmable Gate Arrays September 13, 2004 ECE 697F Reconfigurable Computing Lecture 2 Field Programmable Gate Arrays.

Lecture 7 1. Introduction  Comparison of Standard Logic Circuits and Programmable Logic Circuits  Evolution and Overview of PLC:  PROM, PLA, PAL 

EE4OI4 Engineering Design Programmable Logic Technology.

Unit 9 Multiplexers, Decoders, and Programmable Logic Devices

Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode) Chapter 6 – Selected Design Topics Part 4 – Programmable.

PROGRAMMABLE LOGIC DEVICES (PLD)

CPLD (Complex Programmable Logic Device)

1 Moore’s Law in Microprocessors Pentium® proc P Year Transistors.

J. Christiansen, CERN - EP/MIC

Galen SasakiEE 260 University of Hawaii1 Electronic Design Automation (EDA) EE 260 University of Hawaii.

FPGA-Based System Design: Chapter 3 Copyright  2004 Prentice Hall PTR FPGA Fabric n Elements of an FPGA fabric –Logic element –Placement –Wiring –I/O.

FPGA-Based System Design: Chapter 3 Copyright  2004 Prentice Hall PTR Topics n FPGA fabric architecture concepts.

Programmable Logic Devices

1 Lecture 9 Demultiplexers Programmable Logic Devices  Programmable logic array (PLA)  Programmable array logic (PAL)

Sept. 2005EE37E Adv. Digital Electronics Lesson 1 CPLDs and FPGAs: Technology and Design Features.

0/13 Introduction to Programmable Logic Devices Aleksandra Kovacevic Veljko Milutinovic

Field Programmable Gate Arrays (FPGAs) An Enabling Technology.

Basic Sequential Components CT101 – Computing Systems Organization.

EE3A1 Computer Hardware and Digital Design

Xilinx FPGAs - 1 trend toward higher levels of integration Evolution of implementation technologies zDiscrete devices: relays, transistors (1940s-50s)

Programmable Logic Devices - I. Outline  Programmable Logic Devices  PN Diode Operation  AND Logic Arrays  OR Logic Arrays  Two-level AND-OR Arrays.

Programmable Logic Devices (PLDs)

M.Mohajjel. Why? TTM (Time-to-market) Prototyping Reconfigurable and Custom Computing 2Digital System Design.

ENGN3213: Digital Systems and Microprocessors L#8 1 Lecture 8 Overview Review of Combinational Logic Technologies Logic Implementation Programmable Logic.

FPGA-Based System Design: Chapter 1 Copyright  2004 Prentice Hall PTR Moore’s Law n Gordon Moore: co-founder of Intel. n Predicted that number of transistors.

EE121 John Wakerly Lecture #15

ECE 3110: Introduction to Digital Systems Chapter 5 Combinational Logic Design Practices Programmable Logic Devices.

Delivered by.. Love Jain p08ec907. Design Styles  Full-custom  Cell-based  Gate array  Programmable logic Field programmable gate array (FPGA)

Reconfigurable Architectures Greg Stitt ECE Department University of Florida.

FPGA-Based System Design: Chapter 3 Copyright  2004 Prentice Hall PTR Topics n FPGA fabric architecture concepts.

Thinning Lines Between Software and Hardware Programmable Logic Devices Adam Foust.

3-1 MKE1503/MEE10203 Programmable Electronics Computer Engineering Department Faculty of Electrical and Electronic Universiti Tun Hussein Onn Malaysia.

Introduction to VLSI Design Logic Arrays Tsung-Chu Huang Electronics Eng., NCUE 2016/5/10.

Sequential Programmable Devices

Topics SRAM-based FPGA fabrics: Xilinx. Altera..

We will be studying the architecture of XC3000.

Introduction to Programmable Logic Devices

Introduction to VLSI Design Logic Arrays

Programmable logic and FPGA

Presentation transcript:

VGA Interface1 trend toward higher levels of integration Evolution of implementation technologies zLogic gates (1950s-60s) zRegular structures for two-level logic (1960s-70s) ymuxes and decoders, PLAs zProgrammable sum-of-products arrays (1970s-80s) yPLDs, complex PLDs zProgrammable gate arrays (1980s-90s) ydensities high enough to permit entirely new class of application, e.g., prototyping, emulation, acceleration

VGA Interface2 Gate Array Technology (IBM s) zSimple logic gates ycombine transistors to implement combinational and sequential logic zInterconnect ywires to connect inputs and outputs to logic blocks zI/O blocks yspecial blocks at periphery for external connections zAdd wires to make connections ydone when chip is fabbed x“mask-programmable” yconstruct any circuit

VGA Interface3 Field-Programmable Gate Arrays zLogic blocks yto implement combinational and sequential logic zInterconnect ywires to connect inputs and outputs to logic blocks zI/O blocks yspecial logic blocks at periphery of device for external connections zKey questions: yhow to make logic blocks programmable? yhow to connect the wires? yafter the chip has been fabbed

VGA Interface4 Enabling Technology zCheap/fast fuse connections ysmall area (can fit lots of them) ylow resistance wires (fast even if in multiple segments) yvery high resistance when not connected ysmall capacitance (wires can be longer) zPass transistors (switches) yused to connect wires ybi-directional zMultiplexors yused to connect one of a set of possible sources to input ycan be used to implement logic functions

VGA Interface5 Programming Technologies zFuse and anti-fuse yfuse makes or breaks link between two wires ytypical connections are ohm yone-time programmable (testing before programming?) zEPROM and EEPROM yhigh power consumption ytypical connections are 2K-4K ohm yfairly low density zRAM-based ymemory bit controls a switch that connects/disconnects two wires ytypical connections are.5K-1K ohm ycan be programmed and re-programmed easily (tested at factory)

VGA Interface6 Tradeoffs in FPGAs zLogic block - how are functions implemented: fixed functions (manipulate inputs) or programmable? ysupport complex functions, need fewer blocks, but they are bigger so less of them on chip ysupport simple functions, need more blocks, but they are smaller so more of them on chip zInterconnect yhow are logic blocks arranged? yhow many wires will be needed between them? yare wires evenly distributed across chip? yprogrammability slows wires down – are some wires specialized to long distances? yhow many inputs/outputs must be routed to/from each logic block? ywhat utilization are we willing to accept? 50%? 20%? 90%?

VGA Interface7 Xilinx Programmable Gate Arrays zCLB - Configurable Logic Block y5-input, 1 output function yor 2 4-input, 1 output functions yoptional register on outputs zBuilt-in fast carry logic zCan be used as memory zThree types of routing ydirect ygeneral-purpose ylong lines of various lengths zRAM-programmable ycan be reconfigured

Programmable Interconnect I/O Blocks (IOBs) Configurable Logic Blocks (CLBs)