9-4 The Shifter  Shifter shifts the value on Bus B  Right shift and Left shift Bidirectional shift register with parallel load First clock pulse 에 Bus.

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Presentation transcript:

9-4 The Shifter  Shifter shifts the value on Bus B  Right shift and Left shift Bidirectional shift register with parallel load First clock pulse 에 Bus 로 부터 shift register 로 Second clock pulse 에 shift 실행 Third clock pulse 에 shift register 로 부터 destination register 로 load 시킴  Shifter 가 combinational 회로이면 one clock pulse 로 source register 로 부터 destination register 로 전송가능. ; Bus D 에 있는 data 를 destination register 로 one clock pulse 에 load 가능.

4-Bit 기본 Shifter  S=0, right-shift 빈 공간은 serial input I R 로 채워짐  S=1, left-shift 빈 공간은 serial input I L 로 채워짐  Serial output R 과 L 도 얻을 수 있다.  This shifter must perform m 1-bit position shifts takes m clock cycles. [ 그림 9-8] 4-bit 기본 시프터

Barrel Shifter  Single clock cycle 에 하나의 bit position 이상 shift 를 필요로 할 경우에  Combinational circuit that shifts or rotates the input data bits by the number of bit positions specified by a binary value on a set of selection lines.  Rotation to left 의 경우를 고려하면, 좌측의 MSB 는 LSB 로 인가

4-bit Barrel shifter  S 1, S 0 determines the number of positions that the input data will shifted to The left by rotation. ( 예 ) S 1 S 0 = 01, 입력 data 는 한 번 rotated 되고, D 0 는 Y 1 로, D 1 은 Y 2 로, D 2 는 Y 3 로, D 3 는 Y 0 로 된다. [ 그림 9-9] 4-bit Barrel Shifter

Function table for 4-Bit Barrel Shifter  이러한 left-rotation barrel shifter 를 이용하여, right-rotation 도 가능하다. ; 즉 3 번 left-rotation 하는 것은 한번 right-rotation 하는 것과 같다. ; In general, in a 2 n -bit barrel shifter, i position of the left rotation is the same as 2 n -i bits of right rotation.  2 n input and output lines requires 2 n MUXs. ; Each MUX has 2 n data inputs and n selection inputs. ; Rotation 되는 수는 selection 변수에 의하여 결정되며, 0 ∼ 2 n -1 번 가능. [ 표 9-3] 4-bit Barrel shifter 함수표

9-5 Datapath Representation  In register file, there are three addresses. ; A select, B select, and Destination select. ; Write input 은 Load enable 신 호처럼 사용 [ 그림 9-10] Register File 과 Function Unit 를 사용한 Datapath

G, H, MF 선택 code 를 FS 로 정의한 표

9-6 The Control Word ( 제어워드 )  The selection variables for the datapath control the μ-operations executed within the datapath for any given clock.  How control variables select the μ-operation ; 16 binary control inputs 이 있음. 이것들이 모여서 control word 를 형성. ; 7 개의 field 로 구성 ; DA is for destination register ; AA is to select a register for BUS A, BA is to select a register for BUS B. ; RW determines whether a register is written or not.

Datapath with control variables [ 그림 9-11]

Encoding of Control Word for the Datapath [ 표 9-5]

Microoperation R1 ← R2 + R3' + 1 의 control word 의 구성 Field:DA AA BA MA FS MD RW Symbol: R1 R2 R3 Reg. F=A+B'+1 Function Write Binary:

Datapath Simulation [ 그림 9-12]

Simulation 설명  처음에는 clock pulse 가 나타남.  그 다음 8 개의 값은 datapath 에 대한 input 임.  그리고 status bit (C,V,Z.N), Address out, 그리고 data out 이 나타남.  μ-operation 의 수행 결과 register 의 내용의 변화는 μ-operation 이 명시된 바로 다음 clock cycle 때 나타남을 유의하라. R1 ← R2 -R3 의 결과는 두 번 째 clock cycle 때 R1 에 나타난다. 그러나 Status bits, Address out, Data out 은 첫 번째 clock cycle 에서 나 타남.  R4 의 내용 변화에 대하여 설명 / 다음 clock cycle 에서 register 의 내용이 변했음. ∵ RW=0 이므로