Structures for Discrete-Time Systems 主講人：虞台文

Content Introduction Block Diagram Representation Signal Flow Graph Basic Structure for IIR Systems Transposed Forms Basic Structure for FIR Systems Lattice Structures

Structures for Discrete-Time Systems Introduction

Characterize an LTI System Impulse Response z-Transform Difference Equation

Example Computable Noncomputable

Basic Operations Computable Addition Multiplication Delay In fact, there are unlimited variety of computational structures.

Why Implement Using Different Structures? Finite-precision number representation of a digital computer. Truncation or rounding error. Modeling methods: – Block Diagram – Signal Flow Graph

Block Diagram Representation + x1(n)x1(n) x2(n)x2(n) x 1 (n) + x 2 (n) Adder x(n)x(n) a ax(n) Multiplier x(n)x(n) x(n1)x(n1) z1z1 Unit Delay

Example x(n)x(n) + + b a1a1 z1z1 z1z1 a2a2 y(n)y(n) y(n1)y(n1) y(n2)y(n2)

Higher-Order Difference Equations

Block Diagram Representation (Direct Form I) + z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x(n)x(n) x(n1)x(n1) x(n2)x(n2) x(nM)x(nM) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) y(n1)y(n1) y(n2)y(n2) y(nM)y(nM) v(n)v(n)

+ z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x(n)x(n) x(n1)x(n1) x(n2)x(n2) x(nM)x(nM) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) y(n1)y(n1) y(n2)y(n2) y(nM)y(nM) v(n)v(n)

+ z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x(n)x(n) x(n1)x(n1) x(n2)x(n2) x(nM)x(nM) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) y(n1)y(n1) y(n2)y(n2) y(nM)y(nM) v(n)v(n)

+ z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x(n)x(n) x(n1)x(n1) x(n2)x(n2) x(nM)x(nM) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) y(n1)y(n1) y(n2)y(n2) y(nM)y(nM) v(n)v(n) Implementing zeros Implementing poles

Block Diagram Representation (Direct Form I) + z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x(n)x(n) x(n1)x(n1) x(n2)x(n2) x(nM)x(nM) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) y(n1)y(n1) y(n2)y(n2) y(nM)y(nM) v(n)v(n) How many Adders? How many multipliers? How many delays? How many Adders? How many multipliers? How many delays?

Block Diagram Representation (Direct Form II) + z1z1 z1z1 + z1z1 + b0b0 b1b1 bN1bN1 bNbN x(n)x(n) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) w(n1)w(n1) w(n2)w(n2) w(nN)w(nN) w(n)w(n) Assume M = N

Block Diagram Representation (Direct Form II) + z1z1 z1z1 + z1z1 + b0b0 b1b1 bN1bN1 bNbN x(n)x(n) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) w(n1)w(n1) w(n2)w(n2) w(nN)w(nN) w(n)w(n) Assume M = N

Block Diagram Representation (Direct Form II) + z1z1 z1z1 + z1z1 + b0b0 b1b1 bN1bN1 bNbN x(n)x(n) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) w(n1)w(n1) w(n2)w(n2) w(nN)w(nN) w(n)w(n) Assume M = N Implementing zeros Implementing poles

Block Diagram Representation (Direct Form II) + z1z1 z1z1 + z1z1 + b0b0 b1b1 bN1bN1 bNbN x(n)x(n) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) w(n1)w(n1) w(n2)w(n2) w(nN)w(nN) w(n)w(n) Assume M = N How many Adders? How many multipliers? How many delays? How many Adders? How many multipliers? How many delays?

Block Diagram Representation (Canonic Direct Form) b0b0 b1b1 bN1bN1 bNbN x(n)x(n) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) Assume M = N

Block Diagram Representation (Canonic Direct Form) b0b0 b1b1 bN1bN1 bNbN x(n)x(n) + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y(n)y(n) Assume M = N How many Adders? How many multipliers? How many delays? max(M, N) How many Adders? How many multipliers? How many delays? max(M, N)

Structures for Discrete-Time Systems Signal Flow Graph

Nodes And Branches wj(n)wj(n) wk(n)wk(n) Associated with each node is a variable or node value.

Nodes And Branches wj(n)wj(n) wk(n)wk(n) Brach ( j, k ) Each branch has an input signal and an output signal. Input w j (n) Output: A linear transformation of input, such as constant gain and unit delay.

More on Nodes wj(n)wj(n) wk(n)wk(n) An internal node serves as a summer, i.e., its value is the sum of outputs of all branches entering the node.

Source Nodes Nodes without entering branches xj(n)xj(n)wk(n)wk(n) Source node j

Sink Nodes Nodes that have only entering branches yk(n)yk(n)wj(n)wj(n) Sink node k

Example x(n)x(n) y(n)y(n)w1(n)w1(n) w2(n)w2(n) a b c d e Source Node Sink Node

Block Diagram vs. Signal Flow Graph x(n)x(n) + a z1z1 + b1b1 b0b0 w(n)w(n)y(n)y(n) x(n)x(n) w1(n)w1(n) w2(n)w2(n)w3(n)w3(n) a b1b1 b0b0 z1z w4(n)w4(n) y(n)y(n)

x(n)x(n) + a z1z1 + b1b1 b0b0 w(n)w(n)y(n)y(n) x(n)x(n) w1(n)w1(n) w2(n)w2(n)w3(n)w3(n) a b1b1 b0b0 z1z w4(n)w4(n) y(n)y(n)

Structures for Discrete-Time Systems Basic Structure for IIR Systems

Criteria Reduce the number of constant multipliers – Increase speed Reduce the number of delays – Reduce the memory requirement Modularity: VLSI design The effects of finite register length and finite- precision arithmetic.

Basic Structures Direct Forms Cascade Form Parallel Form

Direct Forms

Direct Form I b0b0 b1b1 x(n)x(n) x(n1)x(n1) x(n2)x(n2) x(nN)x(nN) y(n)y(n) b2b2 b N-1 bNbN x(n  N+1) a1a1 a2a2 a N-1 aNaN y(n1)y(n1) y(n2)y(n2) y(nN)y(nN) y(n  N+1) z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 v(n)v(n)

Direct Form I b0b0 b1b1 x(n)x(n) x(n1)x(n1) x(n2)x(n2) x(nN)x(nN) y(n)y(n) b2b2 b N-1 bNbN x(n  N+1) a1a1 a2a2 a N-1 aNaN y(n1)y(n1) y(n2)y(n2) y(nN)y(nN) y(n  N+1) z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 v(n)v(n)

Direct Form II x(n)x(n) y(n)y(n) w(n)w(n) b0b0 b1b1 b2b2 b N-1 bNbN a1a1 a2a2 a N-1 aNaN z1z1 z1z1 z1z1

Direct Form II x(n)x(n) y(n)y(n) w(n)w(n) b0b0 b1b1 b2b2 b N-1 bNbN a1a1 a2a2 a N-1 aNaN z1z1 z1z1 z1z1

Example x(n)x(n) y(n)y(n) z1z1 z1z1 z1z1 z1z  x(n)x(n) y(n)y(n) z1z1 z1z  Direct Form I Direct Form II

Cascade Form

2nd Order System 2nd Order System 2nd Order System 2nd Order System 2nd Order System 2nd Order System

Cascade Form x(n)x(n)y(n)y(n) z1z1 z1z1 a 11 a 21 b 11 b 21 b 01 z1z1 z1z1 a 12 a 22 b 12 b 22 b 01 z1z1 z1z1 a 13 a 23 b 13 b 23 b 03

Another Cascade Form

Parallel Form

Real Poles Complex Poles Poles at zero Group Real Poles

Parallel Form z1z1 z1z1 a1ka1k a2ka2k e0ke0k e1ke1k

x(n)x(n) y(n)y(n)

Example 8 x(n)x(n)y(n)y(n) z1z1 z1z  77

Example z1z x(n)x(n)y(n)y(n) z1z  25

Structures for Discrete-Time Systems Transposed Forms

Signal Flow Graph Transformation To transform signal graphs into different forms while leaving the overall system function between input and output unchanged.

Transposition of Signal Flow Graph Reverse the directions of all arrows. Changes the roles of input and output. x(n)x(n)y(n)y(n) z1z1 a x(n)x(n)y(n)y(n) z1z1 a

Transposition of Signal Flow Graph x(n)x(n)y(n)y(n) z1z1 a x(n)x(n)y(n)y(n) z1z1 a Are there any relations between the two systems?

Example: z1z1 a x(n)x(n)y(n)y(n) z1z1 a x(n)x(n)y(n)y(n) z1z1 a x(n)x(n)y(n)y(n)

Transposition of Signal Flow Graph Reverse the directions of all arrows. Changes the roles of input and output. x(n)x(n)y(n)y(n) z1z1 a x(n)x(n)y(n)y(n) z1z1 a Detail proof see reference

Structures for Discrete-Time Systems Basic Structure for FIR Systems

FIR For causal FIR systems, the system function has only zeros.

Direct Form x(n)x(n) y(n)y(n) z1z1 z1z1 z1z1 h(0)h(1)h(2) h(M1)h(M1) h(M)h(M)

x(n)x(n) y(n)y(n) z1z1 z1z1 z1z1 h(0)h(1)h(2) h(M1)h(M1) h(M)h(M) Direct Form x(n)x(n) y(n)y(n) z1z1 z1z1 z1z1 h(0)h(1)h(2) h(M1)h(M1) h(M)h(M)

x(n)x(n) y(n)y(n) z1z1 z1z1 z1z1 h(0)h(1)h(2) h(M1)h(M1) h(M)h(M) Direct Form x(n)x(n) y(n)y(n) z1z1 z1z1 z1z1 h(0)h(1)h(2) h(M1)h(M1) h(M)h(M)

Cascade Form

x(n)x(n) y(n)y(n) z1z1 z1z1 b 01 b 11 b 21 z1z1 z1z1 b 02 b 12 b 22 z1z1 z1z1 b 1Ms b 2Ms b 0Ms

M is evenM is odd h(M  n) = h(n) h(M  n) =  h(n) Structures for Linear Phase Systems A generalized linear phase system satisfies: h(M  n) = h(n) for n = 0,1,…,M h(M  n) =  h(n) for n = 0,1,…,M or Type I Type III Type II Type VI

Type I

x(n)x(n) y(n)y(n) z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 h(M/2) h(M/2  1) h(0) h(1)h(2)

Type II, III and VI Construct them in a similar manner by yourselves.

Structures for Discrete-Time Systems Lattice Structures

FIR Lattice Consider x(n)=  (n), one will see

FIR Lattice Consider x(n)=  (n), one will see

FIR Lattice Consider x(n)=  (n), one will see

FIR Lattice Define Consider x(n)=  (n), one will see

FIR Lattice Show that Define

FIR Lattice i=1: Show that

FIR Lattice i = n: Assumed true Show that i = n+1 also true. Prove

FIR Lattice =

m= k1k1 k2k2 k3k3 k4k4 k5k5 k6k6 m=1 m=2 m=3 m=4 m=5 m=6 Given the lattice, to find A(z).

FIR Lattice Given A(z), to find the lattice. m= m=1 m=2 m=3 m=4 m=5 m=6

m= m=1 m=2 m=3 m=4 m=5 m=6 FIR Lattice Given A(z), to find the lattice.

Example m=0 m=1 m=2 m=  

Example   m=0 m=1 m=2 m=  

Inverse Filter

All-Pole Filter

Example    

Example    

Stability of All-Pole Filter All zeros of A(z) have to lie within the unit circle. Necessary and sufficient conditions: All of k-parameters k i ’s satisfy |k i | < 1.

Normalized Lattice

Section i

Normalized Lattice Section N Section N  1 Section 1 Section i

Normalized Lattice Section i Three-Multiplier Form

Normalized Lattice Four-Multiplier, Normalized Form Four-Multiplier, Kelly-Lochbaum Form Three-Multiplier Form

Normalized Lattice Section N Section N  1 Section 1 Three-Multiplier Form

Normalized Lattice Section N Section N  1 Section 1 Four-Multiplier, Normalized Form

Normalized Lattice Section N Section N  1 Section 1 Four-Multiplier, Kelly-Lochbaum Form

Lattice Systems with Poles and Zeros Section N  1 Section 1 Section N c0c0 c1c1 cN2cN2 cN1cN1 cNcN

Lattice Systems with Poles and Zeros Section N  1 Section 1 Section N c0c0 c1c1 cN2cN2 cN1cN1 cNcN

Lattice Systems with Poles and Zeros

Example    c3c3 c2c2 c1c1 c0c0

   c3c3 c2c2 c1c1 c0c0 Example m=0 m=1 m=2 m=  

   Example