CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Project Kokanee: TTL 7400 Series Logic Tester using CMOS VLSI Team John McGlone Drew Willis Paul Berardi Advisor Dr. Robert Albright, Dr. Peter Osterberg Industry Representative Mr. Steve Kassel Intel (Retired)

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Agenda Introduction Dr. Albright Background Paul Methods Paul & John Results John & Drew Conclusions Drew Demonstration Drew

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Introduction The Team –Andrew Willis –John McGlone –Paul Berardi Advisors –Dr. Robert Albright –Dr. Peter Osterberg Industry Representative –Mr. Steve Kassel (Intel, Ret.)

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Introduction A Big Thanks To –Advisors –Dr. Lu –John Felton –Sandra Ressel –Friends and Family –MOSIS –Engineering Janitor, Diep

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Introduction Problem –Unreliable ICs in the microprocessor lab Solution –A device that can quickly and reliably verify the functionality of an IC

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Introduction Goal of this presentation –Background of Project Kokanee –Design methods –Results –Conclusions –Demonstration

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Background What is an IC? Key Parts in Project Kokanee: –CMOS VLSI Chip –Microcontroller (PIC) –Device Under Test (DUT)

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Background Key Functional Specifications –Simplicity –Test ten TTL 7400 Series IC’s Includes various 2-input, 3-input, 4-input AND, NAND, OR, NOR, XOR, and Hex Inverter chips –Produce easy to interpret results

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Methods: Documentation Functional Specifications –Requirements gathering Project Plan –Divide project into task timeline –Estimate length of each task Theory of Operations –Provides conceptual documentation how the device functions

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Methods: Design Process Problem –How will the user interact with the system? –How will the system test the DUT? Solution –Use PIC to control user interface (liquid crystal display (LCD) screen, keypad, etc) –Use PIC to send / receive test vectors

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Methods: Design Process Problem –Limited I/O ports on PIC Solution –Use a CMOS VLSI chip to use least amount of I/O ports to control all DUT inputs and outputs

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Methods: Design Process Problem –How can we verify our results? Solution –Thorough exhaustive testing –Define failure analysis scenarios and a subsets of key failure scenarios to verify

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Results Overview –High Level Block Diagram –VLSI Chip –PIC User interface Testing routine

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering High Level Block Diagram

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering CMOS VLSI Chip VLSI chip provides interface between PIC and DUT (solves pin issue) VLSI chip design process –Simulated in software using B2Logic –.tpr file created for fabrication –Discrete logic macro model created for testing before VLSI chip arrived

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Results

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering VLSI to DUT Pin Interface

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering VLSI Chip Layout

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Results Uses 7 control signals from PIC –Hold I/O configuration –Send test vectors to 14 DUT pins 8 th signal returns resulting signal from desired output pin

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering PIC User Interface –12 button keypad –LCD Screen –Light emitting diodes (LEDs)

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Set I/O Tri-state Buffers Set PIC Testing Routine Apply Test #1 Pin Values Set Set Output Pin Read Output Pin Read Value PIC Value Clear To DUT VLSI Compare Value to Test Vector

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Testing Results: Chip Testing All possible Boolean inputs tested on each logic gate Failure Scenarios –Pin stuck low (voltage state) –Pin stuck high (voltage state) –Pins disconnected –Etc… Tester detected every failure scenario within selected subset

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Testing Results: Device Validation Meets all functional specifications –Accurately tests functionality of the selected IC –Testing of an IC conducted in a timely manner Features –Simple user interface –Actual internal testing process takes a fraction of a second (prevents DUT from frying) –Robust electronics prevent user error affecting tester circuitry

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Conclusions Met and exceeded functional specifications –Created to work for pin chip, modular design allows for an extendable library of chips –Allows for 16-pin chips to be tested as well! –Met deadline and released prototype early –Prototype in tangible, marketable, end-line packaging Leaving a legacy –Tester will be placed in UP microprocessor engineering lab under the care of Dr. Osterberg –Learning tool for future students

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Conclusions Lessons We Learned –Don’t blindly trust documentation –Everything takes more time and money that expected –Patience Demonstration

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Demonstration

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Demonstration

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Demonstration

CS-EE 481 Spring Founder’s Day, 2004 University of Portland School of Engineering Demonstration