The Assembly Process Computer Organization and Assembly Language: Module 10

Machine Code Generation u Assembling a program entails translating the assembly language into binary machine code u This requires more than simply mapping assembly instructions to machine instructions  Each instruction is bound to an address  Labels are bound to addresses  Assembly instructions which refer to labels generate machine instructions which contain the label's address  Pseudo-instructions are translated into one or more machine instructions

Instruction Format addi $13,$7, bits5 bits 16 bits opcode add $13,$7,$8 immediate operand opcode extended opcode (see Appendix A of Patterson & Hennesy for complete details )

The symbol table u The assembler scans the source code and generates the appropriate bit string for each line encountered u The assembler must remember  what memory locations have been allocated  to which address each label is bound u A symbol table is a list of (label, address) pairs u When the data and text segments have been generated, they are stored as an executable file u The file is used by a program called the loader to initialize memory to the appropriate state before execution

Instructions u The.text directive tells the assembler that the lines which follow are instructions.  By default, the text segment starts at 0x u In some cases, a symbol may not have an assigned address yet when the assembler scans the line where it belongs  A second pass through the code can update instructions containing unresolved labels  Maintain a list of addresses in which each unresolved label appears  When the labeled is added to the symbol table, all locations in the corresponding list are updated to hold the address associated with the label

Pseudo-instructions PseudoActual machine implementation addadd, addi, addu, or addiu mulmult and mflo divdiv and mflo (extra for div by zero check) remdiv and mfhi (extra for div by zero check) lilui [and ori] lalui and ori moveori with $0

Branch offset in the MIPS R2000 u In machine code, the target address in a branch must be specified as an offset from the address of the branch. u During execution, this offset is simply added to the program counter to fetch the next instruction  PC contains the address  Offset is measured in words, not bytes PC_NEW = offset*4 + PC_OLD u To calculate the offset, the assembler uses the formula: offset = (target instruction address – (branch instruction address))/4

Branch offset calculation u The offset is stored in the instruction as a word offset rather than a byte offset.  Instructions are only stored at word boundaries  For both target and branch instruction, the least two bits of the address are zero u An offset maybe negative  If the target instruction preceded the branch instruction u The offset is stored in the 16-bit immediate field  This means the branch can only jump about 2 15 instructions before or after the current address  2 15 instructions (words) = 2 17 bytes

Branch offset calculation [0x ] 0x1440ffe6 bne $2, $0, -104 [__start-0x ]; 44: bnez $v0, __start u An entry in the SPIM instruction list orignal assembly code line number in source file offset calculation, in bytes ignores PC increment offset in bytes (__start = 0x ) 0x – (0x ) = machine code stored offset ffe6 = -26 = -104/4 instruction address

Jump target calculation u The jump instruction has two forms  Pseudo-direct, for j and jal  Register direct for jr and jalr  jr and jalr specify a register containing the address to be loaded into the PC  j and jal specify most of the address of the target within the instruction.  However, they have a range of at most one- sixteenth of the memory space fedcba fedcba

Jump target calculation u The target address is a 32 bit quantity  Since all word addresses are multiples of 4 there is no need to store the last two bits  The jump instruction format has 26 bits for the target address  The remaining 6 bits of the instruction are used for the opcode  The highest-order 4 bits of the target are taken from the address currently stored in the program counter PC opcodeJump target bits (26) 00

Jump Target Calculation  jump instructions have a range of 2 26 words or 2 26 x 2 2 =2 28 bytes  This range is NOT symmetric about the jump instruction fedcba fedcba x x x0fffff7c

Program relocation u It is possible that program modules are developed separately by individual programmers. When these programs are to be loaded into memory they should not be assigned overlapping memory space. u To handle this problem, the modules have to be relocated  relative addresses are relocatable  Any absolute references must be "fixed" by the loader  Use a logical base address known at load time  Absolute addresses are stored as offsets from this TBD base

From source to executable compiler assembler linker loader memory exe obj lib asm high-level source code

Some examples of assembling code.data a1:.word 3 a2:.word 16, 16, 16, 16 a3:.word 5.text __start: la $6, a2 loop: lw $7, 4($6) mul $9, $10, $7 b loop li $v0, 10 syscall

Some examples of assembling code Symbol Table symboladdress a a a __start loop Memory map of data section addresscontents c data a1:.word 3 a2:.word 16, 16, 16, 16 a3:.word 5.text __start: la $6, a2 loop: lw $7, 4($6) mult $9, $10, $7 b loop li $v0, 10 syscall

Translate pseudo-instructions lui $6, $6, 0x1000 ori $6, $6, 0x0004 lw $7, 4($6) mult $10, $7 mflo $9 b loop ori $v0, $0, 10 syscall la $6, a2 loop: lw $7, 4($6) mul $9, $10, $7 b loop li $v0, 10 syscall

Translate to machine code lui $6, 0x1000 ori $6, 0x0004 lw $7, 4($6) mult $10, $7 mflo $9 b loop ori $v0, $0, 10 syscall address contents c (lui) c (ori) cc (lw) c 012a 0018 (mult) (mflo) xxxx (beq) a (ori) c c (syscall)

Resolve relative references lui $6, 0x1000 ori $6, 0x0004 lw $7, 4($6) mult $10, $7 mflo $9 b loop ori $v0, $0, 10 syscall address contents c c cc c 012a fffd (-3) a c c [0x (0x400014)]/4 = -12/4 = -3 = 0xfffd