TMS320C6xx Architecture C6xx

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Presentation transcript:

TMS320C6xx Architecture C6xx Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004

'C6x - System Block Diagram P E R I P H E R A L S On Chip Ex. Memory Internal Buses Off Chip Ex. Memory CPU .D1 .M1 .L1 .S1 .D2 .M2 .L2 .S2 Regs (B0-B15) Regs (A0-A15) Control Regs Harvard PC

‘C6x - Internal Buses VLIW CPU Read DMA Write

'C6x - System Block Diagram 32/64 256 Mappate in memoria I/O 32 Mappate in memoria

On Chip Off Chip 'C6x - Peripherals Each of these peripherals has a module dedicated to them and each of these can exist on the C6x Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later. Off Chip

EMIF Ad1 clk1 Ad2 clk2 clk0 Ad3 clk3 Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later.

Memory Size per device C6713 HARVARD Off Chip Memory Fast Slow Devices Internal EMIF A EMIF B C6201, C6701 C6204, C6205 P = 64 kB D = 64 kB 52M Bytes (32-bits wide) N/A C6202 P = 256 kB D = 128 kB C6203 P = 384 kB D = 512 kB C6211 C6711 L1P = 4 kB L1D = 4 kB L2 = 64 kB 128M Bytes C6712 64M Bytes (16-bits wide) C6713 L2 = 256 kB (32 - bits wide) C6411 DM642 L1P = 16 kB L1D = 16 kB C6414 C6415 C6416 L1P = 16 kB L1D = 16 kB L2 = 1 MB 256M Bytes (64-bits wide) Fast Slow

HPI / XBUS / PCI Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later.

McBSP/ASP and Utopia Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later. Bus I2C: Protocollo Seriale Sincrono (due linee bidirezionali, clock e dati sincroni, più la massa) ATM: Asynchronous Transfer Mode

GPIO Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later. LED SWITCH

DMA / EDMA Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later.

Timer / Counter Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later.

Ethernet Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later.

Video Ports Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later.

VCP / TCP - 3G Wireless Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later.

Phase Locked Loop (PLL) Each of these peripherals has a module dedicated to them. (I don’t discuss this, but we don’t really have material on the timers - these are easy enough to figure out on their own from the specs). The main point here is to simply say that each of these can exist on the C6x and a one sentence description of their capability. I sometimes note that the EMIF is considered a peripheral - outside of the core CPU. Depending on the exact device (C6201 for example), the peripheral mix may change. Don’t get into too much detail on any one peripheral - unless the question is simple/quick to answer - again, we will have time to explore each of these later.

Clock Cycle x8 HIDDEN FOIL If you have customers who are curious as to what we mean by “Clock Cycles” or MIPS rate, you may want to use this additional foil. Better yet, go over this material using the white board. Many people ask - so when you say “clock cycle” what do you mean? This is the def'n. It is the machine rate of the processor and this explains how we get the number. But depending on your system - you can choose any number you want by using a different CLKIN and PLL option.

C6713 Architecture HIDDEN FOIL If you have customers who are curious as to what we mean by “Clock Cycles” or MIPS rate, you may want to use this additional foil. Better yet, go over this material using the white board. Many people ask - so when you say “clock cycle” what do you mean? This is the def'n. It is the machine rate of the processor and this explains how we get the number. But depending on your system - you can choose any number you want by using a different CLKIN and PLL option.

C6713-DSK Architecture HIDDEN FOIL If you have customers who are curious as to what we mean by “Clock Cycles” or MIPS rate, you may want to use this additional foil. Better yet, go over this material using the white board. Many people ask - so when you say “clock cycle” what do you mean? This is the def'n. It is the machine rate of the processor and this explains how we get the number. But depending on your system - you can choose any number you want by using a different CLKIN and PLL option.

CPLDs

C6416 Architecture HIDDEN FOIL If you have customers who are curious as to what we mean by “Clock Cycles” or MIPS rate, you may want to use this additional foil. Better yet, go over this material using the white board. Many people ask - so when you say “clock cycle” what do you mean? This is the def'n. It is the machine rate of the processor and this explains how we get the number. But depending on your system - you can choose any number you want by using a different CLKIN and PLL option.

C6416-DSK Architecture Slow Fast HIDDEN FOIL If you have customers who are curious as to what we mean by “Clock Cycles” or MIPS rate, you may want to use this additional foil. Better yet, go over this material using the white board. Many people ask - so when you say “clock cycle” what do you mean? This is the def'n. It is the machine rate of the processor and this explains how we get the number. But depending on your system - you can choose any number you want by using a different CLKIN and PLL option.

‘C6x - Family Part Numbering Ex = TMS320 L C6 2 01 PKG A 200 TMS320 = TI DSP L = Place holder for voltage levels C6 = C6x family 2 = Fixed/Floating-point core 01 = Memory/peripheral configuration PKG = Pkg designator (actual letters TBD) A = -40 to 85C (blank for 0 to 70C) 200 = Core CPU speed in Mhz

Architecture Links: C6711 data sheet: tms320c6711.pdf User guide C6xx: spru189f.pdf Errata: sprz173c.pdf