Other Demos 1 Gsensor  Communicates with the accelerometer chip, displays the X, Y, Z acceleration values  Graphically displays an ASCII “bubble” in the console Drawbox ./drawbox  Draws a solid box with top left corner (x0,y0), bottom right (x1,y1)  Draws to the pixel buffer (in FPGA) that outputs to the VGA port Animation_bouncy  Draws an animation of a box that bounces along the edges of the screen infinitely  Draws to the pixel buffer (in FPGA) that outputs to the VGA port

Running OpenCL on the DE1-SoC 2 Detailed OpenCL discussion in next session! OpenCL application runs on top of Linux Linux drivers facilitate host program to FPGA (kernel) communication (via the FPGA-HPS bridges) Linux distro includes “aocl” application for running OpenCL Overall flow:  Load OpenCL drivers using a provided script source init_opencl.sh  Program the FPGA with the kernel using the aocl utility aocl program /dev/acl0 vector_add.aocx  Execute the host program./vector_add

x86 OpenCL PCIe OpenCL Compiler Standard C Compiler Standard C Compiler SOF EXE OpenCL Host Program + Kernels OpenCL Host Program + Kernels Verilog __kernel void sum(__global float *a, __global float *b, __global float *y) { int gid = get_global_id(0); y[gid] = a[gid] + b[gid]; } __kernel void sum(__global float *a, __global float *b, __global float *y) { int gid = get_global_id(0); y[gid] = a[gid] + b[gid]; } main() { read_data( … ); manipulate( … ); clEnqueueWriteBuffer( … ); clEnqueueNDRange(…,sum,…); clEnqueueReadBuffer( … ); display_result( … ); } main() { read_data( … ); manipulate( … ); clEnqueueWriteBuffer( … ); clEnqueueNDRange(…,sum,…); clEnqueueReadBuffer( … ); display_result( … ); } Quartus Altera OpenCL Library Cyclone V SoC ARM HPS FPGA

Exercise 10: Running an OpenCL Kernel 4 Using AOCL to program and run the Vector Add example Given two input vectors (arrays) add corresponding elements at every index and store the sum in a third array Ex Inputs:  A[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }  B[8] = { 7, 6, 5, 4, 3, 2, 1, 0 } Ex Result:  Answer[8] = { 7, 7, 7, 7, 7, 7, 7, 7 }

Step 1: Connect to the DE1-SoC using Putty 5

Step 2: Load the OpenCL Drivers 6

Step 3: Switch to the Vector Add Directory 7

Step 4: Program the FPGA with the Vector Add Kernel 8

Step 5: Execute the Host Program 9

Step 6: See the Program Output 10

Hands-on Session 11 Please read the instructions at  “/exercise10/instructions.pdf”