Thesis: Introduction Study for a failsafe trigger generation system for the Large Hadron Collider beam dump kicker magnets prepared by Martin Rampl

CERN - The European Laboratory for Particle Physics  Provides the world-leading facilities for particle physics (funded by 19 European countries)  Particles are accelerated and collided within huge detectors  Aim: Investigation of the deepest layers of matter

LHC - The Large Hadron Collider  27 km-proton accelerator with two counter-rotating beams (completion 2005)  Superconducting magnets steer and accelerate the particles up to 7 TeV  Collisions occur within huge particle detectors

General design of the LHC beam dump (beam absorber)  Stored Beam Energy per Ring ~334 MJ (equivalent to 150 kg of TNT)  Gap of ~3 µs is left in the 89 µs (=time for 27 km) beam cycle for the dumping action  dfgdfgfdgdfgh Kicker magnets ~1900m

Tasks of the Trigger Generator  Synchronises the rise of the magnetic field of the kicker magnet with the beam gap  Continues operation if the beam revolution frequency signal is failing

Critical part 1: Internal Oscillator (digital Phase-Locked loop)  Measures continuously the beam revolution frequency  Continues generation of the SYNCHR. PULSE TRAIN signal even if BEAM GAP SYNCHR. is failing

Numerical Controlled Oscillator: Digital Phase Accumulator  Programmed value is added with every clock cycle  Overflow of the adder = Output frequency signal  High resolution (f=100 MHz, N=32bit  Res.=23 mHz)  Stability depends only on quartz oscillator

Internal Oscillator: Advantages-Disadvantages Accuracy only dependent on the short-term stability of the high-frequency quartz oscillator  stable (no temperature drifts,..) Accuracy only dependent on the short-term stability of the high-frequency quartz oscillator  stable (no temperature drifts,..) Reliable Reliable Simple implementation into programmable logic chip Simple implementation into programmable logic chip Easy to adapt to new requirements Easy to adapt to new requirements  Design requires a state-of-the-art chip

Critical part 2: Output Switch OSCILLATOR and DUMP REQUEST = TRIGGER OUT

Implementation block diagram of the Trigger Generator

Conclusion  Digital realisation provides perfect accuracy and stability  Implementation into Programmable logic chip maintains high reliability  But: Redundant and failsafe systems necessary in every case

Future aspects  Prototype will be built until end of July 1999  Final installation will be in 2004  progress in electronics  Changes in the requirements will influence design of the Trigger Generator