Dept. of Electrical and Computer Eng., NCTU 1 Lab 2. NAND and XOR Presenter: Chun-Hsien Ko Contributors: Chung-Ting Jiang and Lin-Kai Chiu.

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Dept. of Electrical and Computer Eng., NCTU 1 Lab 2. NAND and XOR Presenter: Chun-Hsien Ko Contributors: Chung-Ting Jiang and Lin-Kai Chiu

Logic DesignLab 2. NAND and XORChun-Hsien Ko Dept. of Electrical and Computer Eng., NCTU 2 Outlines Learning how to put theory into practice From equations to implementations NAND and XOR Boolean algebra representation of NAND Truth table of NAND Boolean algebra representation of XOR Truth table of XOR The logic transformation of different gates LAB 2 Implement XOR by NAND gate

Logic DesignLab 2. NAND and XORChun-Hsien Ko Boolean algebra representation of NAND A NAND B = NOT(A AND B) Y= (AB)’ Truth table of NAND Dept. of Electrical and Computer Eng., NCTU 3 Input AInput BOutput Y When S1 and S2 are ON, Q is equal to GND. Otherwise, Q is equal to VDD.

Logic DesignLab 2. NAND and XORChun-Hsien Ko Boolean algebra representation of XOR XOR = exclusive OR Y = A ⊕ B = AB’+A’B (sum of product) Truth table of XOR Dept. of Electrical and Computer Eng., NCTU 4 Input AInput BOutput Y

Logic DesignLab 2. NAND and XORChun-Hsien Ko LAB 2: Implement XOR by NAND gate Experiment Materials Bread board Power supply IC:7400 (4 NAND gates) Light-emitting diode (LED) Dept. of Electrical and Computer Eng., NCTU 5

Logic DesignLab 2. NAND and XORChun-Hsien Ko Implement XOR by NAND gate Y = A ⊕ B = AB’+A’B Most of all digital circuits can be implemented by NAND gates NOT gate: A’ = (AA)’ AND gate: AB = ((AB)’)’ OR gate: A+B = ((A’)(B’))’ with De Morgan's law Combinational logic: AB+CD = ((AB)’(CD)’)’ Dept. of Electrical and Computer Eng., NCTU 6

Logic DesignLab 2. NAND and XORChun-Hsien Ko Dept. of Electrical and Computer Eng., NCTU 7

Logic DesignLab 2. NAND and XORChun-Hsien Ko Dept. of Electrical and Computer Eng., NCTU 8 A simple example A XOR B = A AND B’ OR A’ AND B = (A AND B’)’ NAND (A’ AND B)’ = (A’ NAND B) NAND (B’ NAND A) = ((A NAND A) NAND B) NAND ( (B NAND B) NAND A)