Characterization of FD-SOI MOSFETs Based on EKV model Daniel Tomaszewski 1, Denis Flandre 2, Piotr Grabiec 1, Andrzej Kociubinski 1, Christian Renaux 2,

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Presentation transcript:

Characterization of FD-SOI MOSFETs Based on EKV model Daniel Tomaszewski 1, Denis Flandre 2, Piotr Grabiec 1, Andrzej Kociubinski 1, Christian Renaux 2, Krzysztof Kucharski 1 1 Institute of Electron Technology, Warszawa, Poland 2 Université Catholique de Louvain, Louvain-la-Neuve, Belgium presented by Daniel Tomaszewski MOS-AK Workshop, Grenoble, 2005

OUTLINE  MOTIVATION  MOSTXX APPLICATION  EKV MODEL IMPLEMENTATION  EXTRACTION OF THE PARAMETERS  SUMMARY, FUTURE

MOTIVATIONMOTIVATION The FD-SOI becomes an attractive choice for small research groups and SME’s, where research projects related to ASICs /MEMS integration are carried out. A MOSTXX application for MOSFET parameter extraction has been developed in the ITE as a cost effective tool for characterization of the CMOS ICs. Recently the EKV model, has been implemented. The paper reports results of EKV model parameter extraction for the FD-SOI MOSFETs. The analysis has been done using the MOSTXX software.

MOSTXX application Integration with MS ExcelIntegration with MS Excel „Local” extraction:„Local” extraction: Threshold voltageThreshold voltage MobilityMobility „Global” extraction:„Global” extraction: MOSFETs parametersMOSFETs parameters Diodes parameters (I-V, C-V)Diodes parameters (I-V, C-V) Extraction of dimensions variations using sets of devicesExtraction of dimensions variations using sets of devices Edge component Area component

EKV MODEL IMPLEMENTATION The EKV model accounts for weak and strong inversion ranges and is based on interpolation of F(v) The Oguey, Cserveny approximation The approximation in the EKV enhanced in order to calculate F”(v)

TECHNOLOGYTECHNOLOGY n + -poly-Si gate material Boron implantation of the n- and p-channel MOSFETs Basic parameters of the process: Buried oxide thicknessT BOX = 400 nm Final thickness of the silicon filmT Si = 80 nm Gate oxide thicknessT OX = 31 nm Junction depthX J = T Si (assumed) 0.75÷2 µm FD-SOI CMOS process on SmartCut UNIBOND wafers. Semi-recessed LOCOS used to isolate the devices.

DEVICESDEVICES I(V GS ) data of intrinsic (I-type) n- and p-channel MOSFETs I(V GS ) data of highly doped (P12-type) n- and p-channel MOSFETs

DEVICESDEVICES I(V DS ) data of P2- and P12-type n-channel MOSFETs; cumulative boron implantation gives so high boron concentration in the Si film, that “kink-effect” appears

EXTRACTION OF PARAMETERS

The EKV model implemented in optimization tool may be useful for characterization of FD-SOI MOS transistors. The results of extraction of FD SOI MOSFETs parameters: Square-root V T (V B ) dependence should be revised P-channel MOSFETs devices will be characterized SUMMARYSUMMARY GAM, PHI parameters estimated “manually” because of too small number of back gate bias voltages.GAM, PHI parameters estimated “manually” because of too small number of back gate bias voltages. VTO, KP, UCRIT, LAMBDA related to boron concentrationVTO, KP, UCRIT, LAMBDA related to boron concentration NUO is below 1, except of I-type deviceNUO is below 1, except of I-type device

Thanks a lot for your attention Acknowledgement The authors would like to express thanks to Dr Władysław Grabiński from Geneva Modeling Center, Freescale for encouragement towards this work and helpful discussions during its preparation.