Mu2e NA62 TEL62 & TDCB repairs Radiation effects in TEL62 Franco Spinella 16/12/2015

Mu2e NA62 Boards repair (1) 16/12/15F.Spinella2 Some notes: We have a new set of tools to completely test the TDCb dataflow (Patti -> TDCb connector -> TDC -> FPGA -> Tel62) In Pisa we have a certain number of boards (TDCb and TEL62) some broken since the production, others returned from CERN (failed during the run) Every other broken board should be returned to us ASAP (we want to send all the boards to the assembly company in the next weeks in a single lot …) For administrative reasons we have to repair the TDCb boards with priority toward TEL62

Mu2e NA62 TDCb repair and production 16/12/15F.Spinella3 16 TDCb under repair: returned from CERN (12,17,23) 3 repaired (1 is 17) and now in CERN 3 with “simple problems” -> we try to repair in house 10 have issues on FPGA or TDC BGA, need action from assembly company (reflow -> reball -> replace) => LONG TIME IS REQUESTED … 10 new TDCb boards are in production. Will be sent to Pisa for acceptance test around 8/1/2016

Mu2e NA62 TEL62 repair 16/12/15F.Spinella4 14 TEL62 in Pisa : – 2 repaired (still in Pisa) – 2 with “simple problems” => we try repair in house – 3 with problems with BGA (one QDR, one PP3, one SL) need actions from assembly company – 7 TEL62 with problems but not tested yet

Mu2e NA62 Radiation effects in TEL62 16/12/15F.Spinella5 Sporadically during the run we had evidence of firmware corruption, recovered almost all the cases with a board reload (except a few times were a power cycle was the only way to recover) The failures increased with the luminosity Could be related to SEU effects due to radiation …

Mu2e NA62 SRAM based FPGA (1) 16/12/15F.Spinella6 RAM

Mu2e NA62 SRAM based FPGA (2) 16/12/15F.Spinella7

Mu2e NA62 Altera RAM CRC check 16/12/15F.Spinella8 Altera FPGAs includes an hardwired logic to continually calculate the configuration RAM CRC and compare to a stored value The error is acknowledged through a reserved pin or readout through a JTAG register

Mu2e NA62 Altera RAM CRC check (2) 16/12/15F.Spinella9 We have chosen the JTAG way … JTAG is accessed through a script language (JAM) We have scripts to read the CRC-ERROR of all the PPs SL is in progress …

Mu2e NA62 Altera RAM CRC check (3) 16/12/15F.Spinella10 JAM code can be executed through a JAM player loaded in the CCPC No interference between the normal dataflow and the JTAG register readout Run control is enabled to read the CRC-ERROR through the JAM player at the end of each burst (EOB) In case of error the sub-d rectangle change color … A failed CRC on the configuration RAM not necessarily means that the firmware is no more operative: 1)Can be related to the configuration of unused logic 2)Can be related to a non-vital section of the firmware

Mu2e NA62 Preliminary results (1): 16/12/15F.Spinella11 We don’t have a big statistic (scripts available only the last week of the run We had time only to write JAM scripts to read TEL62 fully equipped (4 TDCb in the JTAG chain)

Mu2e NA62 Preliminary results (2): 16/12/15F.Spinella12 We observe: 1.With no beam no CRC errors 2.With low luminosity (30 %) some CRC errors 3.With high luminosity (80 %) within an hour most of the PPs are in the CRC-ERROR condition (mainly KTAG, some LAV, RICH). Some of them are in the non-working condition and need reload All the non-working PP signals the CRC error …

Mu2e NA62 Conclusion: 16/12/15F.Spinella13 -Radiation seems to have sensible SEU effects on the configuration RAM (or something else … power glitches ?) - We should extend the checks also to user RAM and to the DDR (some parity checks are present but maybe are not enough deep) In principle this could be a serious issue for next run (if the beam- shields etc remains the same)