A Load Balanced Switch with an Arbitrary Number of Linecards I.Keslassy, S.T.Chuang, N.McKeown ( CSL, Stanford University ) Some slides adapted from authors Comp 629, Rice University - Presented by Animesh Nandi

Motivation  Internet traffic growth -> Need for faster routers  Approaches 1) Single stage Crossbar switch with central scheduler : Scheduler bottlenecks in memory speed & power dissipation 2) Distributed Multistage switching fabrics : unpredictable throughput 3) Need for architecture that is scalable in terms of memory speed, power requirements and which has predictable throughput.

Load Balanced Router Architecture

Simple Crossbar Switch Outputs 1 2 N Even if arrival is uniform, 100 % throughput not achieved

Fixed Equal-rate switch using multiple VOQs per input Guarantees 100% throughput if arrival is uniform

Load Balancing Switch at Front End

Three Stages in single Linecard

Using Optics for Switching

Guaranteeing 100% throughput and preventing packet missequencing N FIFO queues Load Balan- cing Equi- rate switching

Handling Linecard Failures R R VOQ Required Switching rate = R/2, instead of R/N R R 1 2 N 1 2 N Desired switching rate could becoming arbitrarily high, resulting in Lack of intermediate paths between end-to-end linecards

Hybrid Architecture

Number of MEMS Switches Linecard 1 Linecard 2 Linecard 3 Crossbar Linecard 1 Linecard 2 Linecard 3 4R/3 2R/3 R/3 Linecard 1 Linecard 2 Linecard 3 Crossbar Linecard 1 Linecard 2 Linecard 3 Static MEMS 2R/3 R/3 2R/3 R R R R R R R R R R R R L1 = 2 L2 = 1 N = Σ Li = 3

Number of MEMS needed between a pair of groups  L i : number of linecards in group i, 1 ≤ i ≤ G. Group i needs to send to group j:  Assume each group can send upto R to each MEMS. Number of MEMS needed between groups i and j:

Number of MEMS needed for a schedule  The number of MEMS needed for group i to send to group j is A ij  The total number of MEMS needed for group i is the sum of the A ij ’s  The maximum number of MEMS needed =

Finding a schedule within a frame on N time slots Time slots Linecards N = 7 L1 = 3 L2 = 2 L3 = 2 Switch configuration at time-slot 1

Finding a schedule within a frame on N time slots Time slots Linecards N = 7 L1 = 3 L2 = 2 L3 = 2 Constraint 1 : Linecard 1 should send to N different linecards in N slots

Finding a schedule within a frame on N time slots Time slots Linecards N = 7 L1 = 3 L2 = 2 L3 = 2 Constraint 2 : In a particular timeslot, a linecard should be configured to receive only from a particular linecard

Finding a schedule within a frame on N time slots Time slots Linecards Switch configuration at time-slot 1 Constraint 3 : Number of connections between group I to group j in a particular time-slot is Li * Lj / N A 11 = 2 Constraint fails in time-slot 1 : MEM switches used = 3 Constraint satisfied In time-slot 7

L-L -> L-G -> G-G schedule A A A B B C C L-L schedule L-G schedule G-G schedule A A B B B A C

Linecard Schedule Algorithm 1. Solving for a valid G-G schedule by satisfying MEMS constraint 2. Given the valid G-G schedule, construct a valid L-G and then a valid L-L schedule

Algorithmic Complexity Placement of linecards was chosen randomly with maximum of N = 640 linecards, L = 16 linecards per group, G = 40 groups Conclusion : We need to precompute schedules for effective real-time router reconfiguration

Conclusion  Introduced the hybrid electro-optical architecture.  Showed that it needs at most L+G-1 MEMS.  Found an algorithm to get a linecard schedule satisfying all the constraints.