Csci136 Computer Architecture II Lab#5 Arithmetic Review ALU Design Ripple Carry Adder & Carry lookahead HW #4: Due on Feb 22, before class Feb.16, 2005

Signed and Unsigned Numbers Conversion to Decimal Num’s d n,d n-1,…,d 0  d n *base n +d n-1 *base n-1 +…+d 0 *base 0 Example:  0xABCD  10* * * *16 0 =  1101  1*2 3 +1*2 2 +0*2 1 +1*1 0 = 13

Signed and Unsigned Numbers Signed versus unsigned comparison  Assume 8-bit words $s0: two $s1: two slt $t0, $s0, $s1#signed comparison sltu $t0, $s0, $s1#unsigned comparison

Signed and Unsigned Numbers Sign Extension  16-bit to 32-bit: 12 ten, -12 ten  When? when you shift a register right … the sign bit is repeated to keep a negative number negative  Arithmetic Shift If the sign bit isn’t extended.. (i.e. empty spots filled with 0 s) then the shift is called “Logical” variety of shift

Sign Extension Assume 8 bit words… Shift right logical -11 by 2?  srl Shift right arithmetic -11 by 2?  sra Shift left logical -11 by 2?  sll

Useful Shifts Considering an 8 bit word… how would we compute dividing -6 by 2? Consider an 8 bit word… how would we compute multiplying -7 by 4?

Useful Shifts Shifts are fast. Compilers will often substitute shifts for multiplication and division of integers by powers of 2. Fast multiplication: int fmult(int a,b) { if(b == 0) { return 0; } if (even(b)) return fmult(2*a,b/2); if (odd(b)) return (a+fmult(a, b-1)); }

Addition and Subtraction Sub: a – b = a + (-b)  -b ten = invert(b) + 1 To get negative number from a positive.. Invert all digits and add 1. To get a positive number from a negative… Invert all digits and add 1.

What is Overflow? Consider unsigned 8 bit integers.. What happens when we add 0x73 and 0xA9 ? Can we get overflow when we add a positive and a negative number? Consider signed 8 bit (2’s complement) integers.. what happens when we add 0xBC and 0xB0?

Overflow Conditions for Addition and Subtraction OpABResult indicating overflow A+B>=0 <0 A+B<0 >=0 A-B>=0<0 A-B<0>=0

ALU Design Truth Tables  One logic function that is used for a variety of purposes (including within adders and to compute parity) is exclusive OR. The output of a two-input exclusive OR function is true only if exactly one of the inputs is true. Show the truth table for a two-input exclusive OR function and implement this function using AND gates, OR gates, and inverters.

ALU Design Building Logic Gates  Prove that the NOR gate is universal by showing how to build the AND, OR, and NOT functions using a two-input NOR gate.  Prove that the NAND gate is universal by showing how to build the AND, OR, and NOT functions using a two-input NAND gate.

Ripple Carry Adder CarryOut = b ∙ CarryIn + a ∙ CarryIn + a ∙ b

Faster Addition: Carry Lookahead Objective  Speed up the computation  Simplify the hardware 1st-level of Abstraction  Motivation: c i = f (a, b, c i-1 )  c i = f (a, b, c 0 ) c 1 = (a 0 +b 0 )∙c 0 + a 0 ∙b 0 c 2 = (a 1 +b 1 )∙c 1 + a 1 ∙b 1 = (a 1 +b 1 )∙((a 0 +b 0 )∙c 0 + a 0 ∙b 0 ) + a 1 ∙b 1 c 3 = (a 2 +b 2 )∙c 2 + a 2 ∙b 2 = (a 2 +b 2 )∙((a 1 +b 1 )∙((a 0 +b 0 )∙c 0 + a 0 ∙b 0 ) + a 1 ∙b 1 ) + a 2 ∙b 2 ∙∙∙∙∙  Simplify: g i = a i ∙b i, p i = a i + b i c i = g i-1 + g i-2 ∙p i-1 + … + g 0 ∙p i-1 ∙p i-2 ∙…∙p 1 + c 0 ∙p i-1 ∙…∙p 0

Faster Addition: Carry Lookahead 2nd-level of Abstraction  Motivation: 1st-level abstraction is still expensive! c 8 = g 7 + g 6 ∙p 7 + g 5 ∙p 7 ∙p 6 + g 4 ∙p 7 ∙p 6 ∙p 5 + g 3 ∙p 7 ∙p 6 ∙p 5 ∙p 4 + g 2 ∙p 7 ∙p 6 ∙p 5 ∙p 4 ∙p 3 + g 1 ∙p 7 ∙p 6 ∙p 5 ∙p 4 ∙p 3 ∙p 2 ∙p 1 + c 0 ∙p 7 ∙p 6 ∙p 5 ∙p 4 ∙p 3 ∙p 2 ∙p 1 ∙p 0  How: Divide the bits into groups(sizeof n), each group using the carry-lookahead logic Connect them in ripple carry way

Faster Addition: Carry Lookahead c 8 = G 7,4 + G 3,0 ∙P 7,4 + c 0 ∙P 7,4 ∙P 3,1

HW#4 Give MIPS code for abs $t2, $t3 If a>=0 then abs(a)=a else abs(a)=-a end

HW#4 Load 32-bit address lui $t0, A_upper_adjusted lw $s0, A_lower($t0)  A_lower will be sign-extended to compute the address! e.g. A=0x0001A001 ? + 0xFFFFA001 = 0x0001A001

HW#4 Carry out bit?  Overflow conditions for addition and subtraction OpABResult indicating overflow A+B>=0 <0 A+B<0 >=0 A-B>=0<0 A-B<0>=0

HW#4 slt $t0, $s0, $s1  slt: R[rd] = (R[rs]<R[rt])? 1:0  Compare? bne, beq

HW#4 Relative Performance of Adders  Equal time for AND, OR operation  Ripple carry: c1  c2  c3  c4 Time: add them together!  Carry lookahead: {p1, p2, p3, p4, g1, g2, g3, g4}  {c1, c2, c3, c4} Time?