Sandia NINE: Intel Expectations C. Michael Garner Technology Strategy.

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Presentation transcript:

Sandia NINE: Intel Expectations C. Michael Garner Technology Strategy

Technology Strategy, July 23, Intel Challenges (Sandia NINE) Continuing to increase integrated circuit density every 2 years Assembling nanostructured materials in predefined locations and directions High speed delivery of power to integrated circuits High reliability packaging for complex integrated circuits Package polymers need different properties through the assembly process and use

Technology Strategy, July 23, Nanotechnology Challenge Demonstrate proof of concept that nanomaterials and nanotechnology could provide solutions to difficult challenges Ability to enable desired functions at the macrolevel Resolve critical issues that could limit use Provide fundamental understanding of how nanomaterial properties and integration affect macroproperties

Technology Strategy, July 23, Sandia NINE Projects Imprint & Directed Self Assembly for Lithography High density lithography Scalable Assembly of Patterned Ordered Functional Micelle Arrays High density capacitors for power delivery Enabling Self-Powered Ferroelectric Nano-Sensors: Fundamental Science of Interfacial Effects Under Extreme Conditions High dielectric constant capacitors with reliable properties Responsive Nanocomposites Package polymers with designer properties in process and application

Technology Strategy, July 23, Sandia NINE Challenge Bridge the Gap Between University Research and Industrial Needs Optimize Interactions and Access to Sandia National Labs Resources Establish Effective Communications Mechanisms with Industry Mentors

Technology Strategy, July 23, Imprint & Directed Self Assembly for Lithography Issues that could limit use Defects Required Flexibility of Features Alignment of features between levels Total Cost of Integration –Imprint tools vs. mask cost –Throughput –Materials Cost –Yield

Technology Strategy, July 23, Scalable Assembly of Patterned Ordered Functional Micelle Arrays Assembly of ultra high charge storage capacitors –GHz speed capacitors –Metal-Insulator-Metal with ultra high density 3D structures –Low inductance Control dimensions and separation Low contact resistance Ability to deposit a high κ dielectric and top electrode material

Technology Strategy, July 23, Enabling Self-Powered Ferroelectric Nano-Sensors: Ability to minimize interface electrical and dielectric degradation of perovskite dielectrics in integrated structures What factors could cause environmental degradation? –Oxygen vacancy generation.. –Hydrogen… –Bias –Electrode Interactions How how could these be minimized? –Electrode choice –Interfacial structure & composition between electrode and dielectric –Dopants –Gettering Centers

Technology Strategy, July 23, Responsive Nanocomposites Thermoset Polymer Modulate mechanical properties independently Tune Adhesion Crack Modulation (arrest or modulate) Moisture Absorption

Technology Strategy, July 23,

Technology Strategy, July 23, Summary Demonstrate proof of concept that nanomaterials and nanotechnology could provide solutions to difficult challenges Bridge the Gap Between University Research and Industrial Needs Optimize Interactions and Access to Sandia National Labs Resources Establish Effective Communications Mechanisms with Industry Mentors

Technology Strategy, July 23, Back-up

Technology Strategy, July 23, Mentors Sandia NINE ProjectIntel Mentor Imprint & Directed Self Assembly for Lithography Todd Younkin Responsive NanocompositesRahul Manepalli Scalable Assembly of Patterned Ordered Functional Micelle Arrays Larry Mosley Enabling Self-Powered Ferroelectric Nano- Sensors: Fundamental Science of Interfacial Effects Under Extreme Conditions Larry Mosley