Embedded Systems February 10, 2016
Serial Interface - SPI Serial Peripheral Interface Synchronous communications Clock supplied by the Master (The unit controlling the communications) Full duplex communications Interface with devices like: LCD displays Sensors Cameras Real Time Clocks Memory
SPI Interfacing with LCD module Left side (Master) would be the MCU Right side (Slave) would be the LCD Each clock cycle, shifts one bit into the Slave Clock speed determined by the master SS = Slave Select
SPI configuration SPI Control Register 1 (SPICR1) SPI Control Register 2 (SPICR2) SPI Baud Rate Register (SPIBR) SPI Status Register (SPISR) SPI Data Register (SPIDR)
Serial Interface Serial Communications Interface Asynchronous communications Each device has its own serial clock Baud rate negotiated before communications Interface with devices like: LCD displays Sensors Computers Printers
SCI Data Format
SCI Interface configuration SCI Baud Rate Registers (SCIBDH and SCHBDL) SCI Control Register 1 (SCICR1) SCI Control Register 2 (SCICR2) SCI Status Register 1 (SCISR1) SCI Status Register 2 (SCISR2) SCI Data Registers (SCIDRH and SCIDRL)
Synchronization between devices Software Latency: The time between when the I/O device needs service, and the time when service is initiated. For an input device, latency is the time between new input data ready, and the software reading the data. For an output device, latency is the time between output device idle, and the software giving the device new data to output. Periodic events (sampling ADC, outputting to DAC). Latency is the time between - when it is supposed to be run, and when it is actually run. taken from notes by: Jonathan W. Valvano
Synchronization between devices A real time system is one that can guarantee a worst case software latency. In other words, there is an upper bound on the software response time. Hardware Latency or device latency is the time between when an I/O device is given a command, and the time when command is completed. taken from notes by: Jonathan W. Valvano
Synchronization between devices I/O bound Bandwidth is limited by speed of I/O device Making the I/O device faster will increase bandwidth Making the software run faster will not increase bandwidth Software often waits for the I/O device CPU bound Bandwidth is limited by speed of executing software Making the I/O device faster will not increase bandwidth Making the software run faster will increase bandwidth Software does not have to wait for the I/O device taken from notes by: Jonathan W. Valvano
Synchronization Five ways to synchronize Blind Cycle counting Busy Waiting Interrupt Periodic Polling Direct Memory Access taken from notes by: Jonathan W. Valvano
Blind Cycle Counting taken from notes by: Jonathan W. Valvano
Gadfly or Busy Waiting taken from notes by: Jonathan W. Valvano
Interrupts When data is read or written, the processor is interrupted from current task We will study interrupts in details so let’s leave it for now
Periodic Polling Write value Check if value is processed Do other stuff Come back and check if value is processed
Direct Memory Access I/O device reads/writes directly to RAM We will not worry about this synchronization in this course taken from notes by: Jonathan W. Valvano