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2

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami3 Figure 9.1 Schematic representation of 4-bit code for integers in [0, 15].

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami4 Figure 9.2 Overflow regions in finite number representation systems. For unsigned representations covered in this section, max – = 0.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami5 Figure 9.3 Adding a binary number or another carry-save number to a carry-save number.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami6 Figure 9.4 Justifying one step of the conversion of x to radix 2.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami7 Figure 9.5 Schematic representation of 4-bit 2’s-complement code for integers in [–8,+7].

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami8 Figure 9.6 Binary adder used as 2’s-complement adder/subtractor.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami9 Figure 9.7 Schematic representation of 4-bit 2’s-complement encoding for (1 + 3)-bit fixed-point numbers in the range [–1, + 7/8].

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami10 Table 9.1 Some features of the ANSI/IEEE standard floating-point formats.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami11 Figure 9.8 The two ANSI/IEEE standard floating-point formats.