NIKHEF 2014 David Calvo IFIC (CSIC – Universidad de Valencia) Time to Digital Converters for KM3NeT Data Readout System
LVDS Input Signal Output (48 bits) KC705 MULTIPLEXER Ch.1 Ch.2 Ch.31 SIGNAL DISTRIBUTION Enable Interface Ch.1 Ch.31 PC KM3NeT: 31 TDC CHANNELS 2
TDC: TEST ML605 LVDS Input Signal Output (48 bits) KC705 Well-known pattern MULTIPLEXER Ch.1 Ch.2 Ch.31 SIGNAL DISTRIBUTION Enable Interface Ch.1 Ch.31 PC 3
TDC: TEST 4
5 2 nd LM32 CLOCK DISTRIBUTION SYSTEM OUTCLK (250 MHZ)
TDC: PATTERNS TO TEST Jitter = 0.3 ns CHANNEL 1 CHANNEL 2 6
TDC: PATTERN TO TEST Patterns replicated 5000 times and pulses x channel CHANNEL 1 CHANNEL 2 7
TDC: RESULTS Pulse width CHANNEL 1CHANNEL 2 8
TDC: RESULTS 16 CHANNELS 9
SPI FLASH: REPLACING 10 The current 1 Gb spi model (n25q00AA) is not supported by xilinx. We have to check compatibility with Kintex-7 In our first test we mounted one S25FL256 replacing the N25Q1024 with the S25FL256 SPI flashing has worked fine
THANKS FOR YOUR ATTENTION! 11