Probabilistic Verification Tong Wang tw2436 Yihan Zou yz2575 Hang Yin hy2368 Miaoqiong Wang mw2908 of Go-Back-N.

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Probabilistic Verification Tong Wang tw2436 Yihan Zou yz2575 Hang Yin hy2368 Miaoqiong Wang mw2908 of Go-Back-N

Assumption Components of states Flow chart of algorithm Analysis Agenda

Assumptions RTT >> Tx: multiple messages on channel FC and BC are FIFO queues: packets arrive in order Sender/ Receiver can only process one packet at a time Sender always has packet to send Timeout occur Stopping conditions Initial state: ( 0 0 (0,1,2,3) ( ) )

Source

Receiver

Timeout Backward channel is empty Both forward and backward channel is empty

Stopping points 3 lost packages on the channel ACK0 is successfully received

Global state (Tx, Rx, FC, BC) Four stacks: stack(i) contains states going through i low probability transitions

Initial (0 0 (0,1,2,3) ()) Get M0, Get M1, Get M2, Get M30 step 1Pop (0 0 (0,1,2,3) ()) (0 1 (1,2,3) (0)) Get M0, Get M1, Get M2, Get M3, Acpt M00 (0 0 (1,2,3) ()) Get M0, Get M1, Get M2, Get M31 step 2Pop (0 1 (1,2,3) (0)),(1 1 (1,2,3,4) ()) is accepted (0 2 (2,3) (0,1)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M10 (0 1 (1,2,3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M01 (0 1 (2,3) (0)) Get M0, Get M1, Get M2, Get M3, Acpt M01 (0 0 (1,2,3) ()) Get M0, Get M1, Get M2, Get M31 step 3Pop (0 2 (2,3) (0,1)),(1 2 (2,3,4) (1)) is accepted (0 3 (3)(0,1,2)) Get M0, Get M1, Get M2, Get M3, Acpt M0, AcptM1, AcptM2 0 (0 2 (2,3) (1)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M11 (0 2 (3) (0,1)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M11 (0 1 (1,2,3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M01 (0 1 (2,3) (0)) Get M0, Get M1, Get M2, Get M3, Acpt M01 (0 0 (1,2,3) ()) Get M0, Get M1, Get M2, Get M31

Stopping point analysis

step 49Pop (0 3 () (1,2)),(2 3 (4,5) (2)) is accepted (0 4 () (2,3)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M2, Acpt M32 (0 3 (3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M23 (0 3 () (2)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M23 (0 2 (3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M13 (0 2 () (1)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M13 (0 1 (3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M03 (0 1 () (0)) Get M0, Get M1, Get M2, Get M3, Acpt M03 (0 0 (3) ()) Get M0, Get M1, Get M2, Get M33 (0 0 () ()) Get M0, Get M1, Get M2, Get M33 (0 0 (0,1,2,3) ()) Get M0, Get M1, Get M2, Get M33 (0 4 () (1,2,3)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M2, Acpt M33 (0 3 (3) (1,2)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M23 (0 3 () (0,1,2)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M23 (0 2 (2,3) (1)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M13 (0 2 (3) (0,1)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M13 (0 1 (1,2,3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M03 (0 1 (2,3) (0)) Get M0, Get M1, Get M2, Get M3, Acpt M03 (0 0 (1,2,3) ()) Get M0, Get M1, Get M2, Get M33

step 50Pop (0 4 () (2,3)),(3 4 (4,5,6) (3)) is accepted (0 4 () (3)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M2, Acpt M3 3 (0 3 (3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M23 (0 3 () (2)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M23 (0 2 (3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M13 (0 2 () (1)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M13 (0 1 (3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M03 (0 1 () (0)) Get M0, Get M1, Get M2, Get M3, Acpt M03 (0 0 (3) ()) Get M0, Get M1, Get M2, Get M33 (0 0 () ()) Get M0, Get M1, Get M2, Get M33 (0 0 (0,1,2,3) ()) Get M0, Get M1, Get M2, Get M33 (0 4 () (1,2,3)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M2, Acpt M33 (0 3 (3) (1,2)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M23 (0 3 () (0,1,2)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M1, Acpt M23 (0 2 (2,3) (1)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M13 (0 2 (3) (0,1)) Get M0, Get M1, Get M2, Get M3, Acpt M0, Acpt M13 (0 1 (1,2,3) ()) Get M0, Get M1, Get M2, Get M3, Acpt M03 (0 1 (2,3) (0)) Get M0, Get M1, Get M2, Get M3, Acpt M03 (0 0 (1,2,3) ()) Get M0, Get M1, Get M2, Get M33

Table1(157 steps) Table2(50 steps) VS

Self Critique 1. Additional assumptions about channel  RTT>> Tx, push 4 msg into channel, omit the possibility of Rx prompt reply (concurrency)  RTT < timeout interval, omit the possibility of pre- mature timeout (fixed already)

Self Critique (cont’d) 2. No mapping of msg # from Real Number to finite set of number {0,1,2,3}  Hard to justify stopping point, successful reception of ACK(100) does not guarantee the successful reception of ACK(101)

Self Critique (cont’d) 3. Insufficient justification of stopping  We stop verification when first message is successfully received, and take it for granted that the following messages can be received (need to verify!)

Self Critique (cont’d) Our valuables:  Stack processing technique  Under our assumptions, reasonable results are obtained  Succinct implementation of program

Thank you!