Assembly Language Data Movement Instructions

MOV Instruction Move source operand to destination mov destination, source The source and destination are often called operands MOV AX, BX instruction –transfers the word contents of the source register (BX) into the destination register (AX) –the leftmost 16 bits of register EAX does not affected –the source register’s contents BX do not change Source and destination operands can vary (Register, Memory, Immediate, …etc)

MOV Instruction..Rules Rules –Both operands must be of same size –No memory to memory moves –No segment to segment moves –EAX, EBX, ECX, EDX, ESP, EBP, EDI,ESI, CS, ES, DS, SS, FS, and GS registers can be used –Destination cannot be CS, EIP, or IP –No immediate to segment moves –MOV instructions not affect the flag bits.

Addressing modes Define how machine language instructions identify the operand(s) of each instruction Addressing Mode Type: –Register  MOV AX,BX –Immediate  MOV CH,3AH –Direct  MOV [1234H],AX –Register indirect  MOV [BX],CL –Base-plus-index  MOV [BX+SI],BP –Register relative  MOV CL,[BX+4] –Scaled index  MOV [EBX+2 × ESI],AX

Examples of register-addressed instructions

Examples of immediate addressing

Direct addressed instructions

Examples of register indirect addressing

Examples of base-plus-index addressing

Examples of register relative addressing

MOVZX Instruction MOVZX (move and zero-extend) –Fills (extends) the upper part of the destination with zeros –Used to copy a small source into a larger destination –Destination must be a register –movzx ax, cl

MOVSX Instruction MOVSX (move and sign-extend) –Fills (extends) the upper part of the destination register with a copy of the source operand's sign bit –Used to copy a small source into a larger destination – movsx ax, bl

XCHG Instruction XCHG exchanges the values of two operands xchg reg, reg xchg reg, mem xchg mem, reg xchg ah, al ; exchange 8-bit regs xchg ax, bx ; exchange 16-bit regs Rules Operands must be of the same size At least one operand must be a register No immediate operands are permitted

Load Effective Address Instructions There are several load-effective address instructions in the microprocessor instruction set ( LEF, LDS, LES,LFS,LSS,LGS) LEF : loads a 16- or 32-bit register with the offset address of the data specified by the operand –LEA BX,[DI] loads the offset address specified by [DI] (contents of DI) into the BX register BUT –MOV BX,[DI] loads the data stored at the memory location addressed by [DI] into register BX –LEA BX, 3[BX]  BX=BX+3 ; ADD Plus Move –LEA AX,NUMB Loads AX with the offset address of NUMB –The OFFSET directive performs the same function as an LEA instruction MOV BX,OFFSET LIST performs the same function as LEA BX,LIST

LDS, LES, LFS, LGS, and LSS The LDS, LES, LFS, LGS, and LSS instructions let you load a 16 bit general purpose register and segment register pair with a single instruction LxS dest, source lds reg16, mem32 Reg16 :is any general purpose 16 bit register and mem32: is a double word memory location reg16 = [mem32], ds = [mem32 + 2] The LDS and LES instructions are the only instructions that directly process values larger than 32 bits.

LDS Example

Assembly Example

The PUSH and POP instructions The PUSH and POP instructions are important instructions that store and retrieve data from the LIFO (last-in, first-out) stack memory The microprocessor has six forms of the PUSH and POP instructions –push reg 16 pop reg 16 –push reg 32 pop reg 32 –push segreg pop segreg (except CS) –push memory pop memory –push immediate_data –Pusha popa –Pushad popad –Pushf popf –Pushfd popfd The stack memory it is always in the stack segment (wherever ss points) The stack grows down in memory Stack pointer (ss:sp) always contains the address of the value on the top of the stack

Push instruction Push instructions (16 bits) –sp=sp-2 –store 16-bit register operand at location SS:SP –The first (most-significant) data byte moves to the stack segment memory location addressed by sp-1 – The second (least-significant) data byte moves into the stack segment memory location addressed by sp-2 push instructions (32 bits) –SP := SP - 4 –[SS:SP] = 32 bit operand pop instructions (16 bits): –16-bit operand = [SS:SP] –SP = SP + 2 pop instructions (32 bits): –32 bit operand = [SS:SP] –SP = SP + 4

Push example Push AX Before execution the instruction

Push examples The word ptr operator force 16 bit operation or we can use PushD The dword ptr operator force 32 bit operation When push 32-bit immediate can use: –PUSH 0045H –PUSHD 0045H

POP Examples Suppose that a POP BX instruction executes –The first byte of data removed from the stack (the memory location addressed by SP in the stack segment) moves into register BL –The second byte is removed from stack segment memory location SP - 1and is placed into register BH –After both bytes are removed from the stack, the SP register is incremented by 2.

PUSHA Instruction PUSHA (push all) instruction copies the 16-bit registers to the stack in the following order: AX,CX, DX, BX, SP, BP, SI, and DI The value for SP that is pushed onto the stack is whatever it was before the PUSHA instruction executed The POPA (pop all) instruction removes 16 bytes of data from the stack and places them into the following registers, in the order shown: DI, SI, BP, SP, BX, DX, CX, and AX PUSHA instruction requires 16 bytes of stack memory space to store all eight 16-bit registers –Ex.: PUSHA (no operands) –After PUSHA instruction the sp=sp-16 The PUSHAD instruction places the 32-bit register set on the stack : EAX,ECX, EDX, EBX, ESP, EBP, ESI, and EDI PUSHAD requires 32 bytes of stack storage space.

PUSHF instruction The PUSHF and POPF instructions allow you to push/pop the processor status register (the flags register) into stack –The POPF (pop flags) instruction removes a 16-bit number from the stack and places it into the flag register The PUSHFD and POPFD instructions allow you to push/pop the EFLAG register into stack –The POPFD removes a 32-bit number from the stack and places it into the extended flag register