Pushpin Computing System Overview Joshua Lifton et. al Ubicomp class reading 2005.4.12 Presented by BURT.

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Presentation transcript:

Pushpin Computing System Overview Joshua Lifton et. al Ubicomp class reading Presented by BURT

The Problem The scaling of sensor network Distributed computing (self-organization) To provide a H/W and S/W architecture

About Sensor “A cockroach has 30,000 hairs, each of which is a sensor. The most complex robot we’ve built has 150 sensors and it’s just about killed us. We can’t expect to do as well as animals in the world until we get past that sensing barrier.” Rodney Brooks in Fast, Cheap & Out of Control

Related Works Paintable Computer (Butera)

Related Works StartLogo Programming language (Resnick) SmartDust/TinyOS (Berkeley)

Design Point The goal is to devise sensor networks that self-organize in such a way so as to preprocess and condense sensory data at the local sensor level before (optionally) sending it on to more centralized systems.

Design Point – Each Pushpin (node) has the ability to communicate locally with its spatially proximal neighbors, the neighborhood being defined by the range of the mode of communication employed. – Each Pushpin must reliably handle the fact that the number of addressable neighbors in the communication neighborhood can vary unpredictably. – Each Pushpin must reliably handle the fact that messages sent to its neighbors may exhibit probabilistic transit times and are not explicitly acknowledged. – Each Pushpin must provide for a mechanism for installing, executing, and passing on to its neighbors code and data received over the communication channel.

Hardware 20MIPS Processor Form Factor: 18x18mm 4 modules: Power Communication Processing AP specific function

Power Module 2.7VDC to 3.3VDC.

Communication Module UART: infrared, RS232.. Etc. Infrared

Communication Module

Processing Module Cygnal C8051F016 an 8-bit, mixedsignal, up to 25 MIPS, core microprocessor 2.25-Kbytes of RAM 32-Kbytes of in-system programable (ISP) flash memory LED indicates the status of the microprocessor

Expansion Module where most of the user hardware customization takes place for any given Pushpin general purpose digital I/O Analog-to-digital converters IEEE standard JTAG programming and debugging pins application-specific sensors, actuators, and external interrupt sources.

Hardware Hierarchy

Programming Model algorithmic self-assembly (paintable computer) an operating system, networking protocol, and process fragment integrated development environment (IDE) have been implemented

Self-Assembly Code Traditional scheme Self-assembly

Programming Model

Process Fragment Defined: state and code Contained and executed with a single pushpin may transfer or copy itself to neighboring Pushpins and begin execution there.

PFrag Conformance – Implement an install function to be called by Bertha when the process fragment is first executed in a given Pushpin. – Implement a deinstall function to be called by Bertha when the process fragment is to be removed from a given Pushpin. – Implement an update method to be repeatedly called by Bertha as long as the process fragment resides within a Pushpin. There is no guarantee how often the update function will be called, only that it will be called. This is where most of the functionality of a process fragment resides. – Total process fragment code size limit of 2-Kbytes. – Total process fragment state size limit of 445-bytes.

PFrag Codes

Bertha:The Pushpin OS small, lightweight operating system developed especially for the Pushpins can accommodate up to 11 process fragments code to flash memory and state to RAM bulletin board system (BBS) A Pushpin’s BBS can be posted to and read from only by process fragments Neighborhood Watch

Bertha:The Pushpin OS Exponential back-off algorithm ADC channel to detect module type GPIO 1024-bit seed for use in a pseudo-random number generator

Pushpin IDE a Java program that runs on a desktop PC Subset of ANSI C Keil C51 compiler and Keil BL51 linker IEEE standard JTAG interface can be programmed directly as a regular 8051-core microprocessor

Security Bertha runs any well-formed process fragment as raw machine code without any supervision. no built-in protection against rogue process fragments with malicious intent

Example

Conclusion This paper describes the basic elements of the Pushpin Computing platform, designed to support algorithmic self-assembly for use in dense sensor networks. The work presented is more of a look at things to come than a culmination or conclusion of things that were.

Future Work plans to implement a Logo virtual machine on the Pushpins, improve error correction and detection build several complete networking and sensing applications using on the order of 100 Pushpin nodes. providing a theoretical foundation to describe self-assembly as a general phenomenon.

Attacks Power supplying in a dense sensor network?

The End