1. 1 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) CPRE 583 Reconfigurable Computing Lecture 19: Fri 10/28/2011 (Design Patterns) Instructor: Dr. Phillip Jones (phjones@iastate.edu) Reconfigurable Computing Laboratory Iowa State University Ames, Iowa, USA http://class.ee.iastate.edu/cpre583/

2. 2 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) MP3: Due 11/4 –IT should have resolved the issue that was causing problems running MP3 on some of the linux-X and research-X remote machines Weekly Project Updates due: Friday’s (midnight) Will post ML507 ucf for quick reference Announcements/Reminders

3. 3 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Project Grading Breakdown 50% Final Project Demo 30% Final Project Report –20% of your project report grade will come from your 5-6 project updates. Friday’s midnight 20% Final Project Presentation

4. 4 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) FPL FPT FCCM FPGA DAC ICCAD Reconfig RTSS RTAS ISCA Projects Ideas: Relevant conferences Micro Super Computing HPCA IPDPS

5. 5 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Teams Formed and Topic: Mon 10/10 –Project idea in Power Point 3-5 slides Motivation (why is this interesting, useful) What will be the end result High-level picture of final product –Project team list: Name, Responsibility High-level Plan/Proposal: Fri 10/14 –Power Point 5-10 slides (presentation to class Wed 10/19) System block diagrams High-level algorithms (if any) Concerns –Implementation –Conceptual Related research papers (if any) Projects: Target Timeline

6. 6 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Work on projects: 10/19 - 12/9 –Weekly update reports More information on updates will be given Presentations: Finals week –Present / Demo what is done at this point –15-20 minutes (depends on number of projects) Final write up and Software/Hardware turned in: Day of final (TBD) Projects: Target Timeline

7. 7 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Initial Project Proposal Slides (5-10 slides) Project team list: Name, Responsibility (who is project leader) –Team size: 3-4 (5 case-by-case) Project idea Motivation (why is this interesting, useful) What will be the end result High-level picture of final product High-level Plan –Break project into mile stones Provide initial schedule: I would initially schedule aggressively to have project complete by Thanksgiving. Issues will pop up to cause the schedule to slip. –System block diagrams –High-level algorithms (if any) –Concerns Implementation Conceptual Research papers related to you project idea

8. 8 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Weekly Project Updates The current state of your project write up –Even in the early stages of the project you should be able to write a rough draft of the Introduction and Motivation section The current state of your Final Presentation –Your Initial Project proposal presentation (Due Wed 10/19). Should make for a starting point for you Final presentation What things are work & not working What roadblocks are you running into

9. 9 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Introduction to common Design Patterns & Compute Models What you should learn

10. 10 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Design patterns –Why are they useful? –Examples Compute models –Why are they useful? –Examples Outline

11. 11 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Design patterns –Why are they useful? –Examples Compute models –Why are they useful? –Examples Outline

12. 12 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) References Reconfigurable Computing (2008) [1] –Chapter 5: Compute Models and System Architectures Scott Hauck, Andre DeHon Design Patterns for Reconfigurable Computing [2] –Andre DeHon (FCCM 2004) Type Architectures, Shared Memory, and the Corollary of Modest Potential [3] –Lawrence Snyder: Annual Review of Computer Science (1986) Design Patterns: Abstraction and Reuse of Object Oriented Design [4] –E. Gamma (1992) The Timeless Way of Building [5] –C. Alexander (1979)

13. 13 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Design patterns: are a solution to reoccurring problems. Design Patterns

14. 14 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) “Building good reconfigurable designs requires an appreciation of the different costs and opportunities inherent in reconfigurable architectures” [2] “How do we teach programmers and designers to design good reconfigurable applications and systems?” [2] Traditional approach: –Read lots of papers for different applications –Over time figure out ad-hoc tricks Better approach?: –Use design patterns to provide a more systematic way of learning how to design –It has been shown in other realms that studying patterns is useful Object oriented software [4] Computer Architecture [5] Reconfigurable Hardware Design

15. 15 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Provides a means to organize and structure the solution to a problem Provide a common ground from which to discuss a given design problem Enables the ability to share solutions in a consistent manner (reuse) Common Language

16. 16 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) 10 attributes suggested by Gamma (Design Patterns, 1995) –Name: Standard name –Intent: What problem is being addressed?, How? –Motivation: Why use this pattern –Applicability: When can this pattern be used –Participants: What components make up this pattern –Collaborations: How do components interact –Consequences: Trade-offs –Implementation: How to implement –Known Uses: Real examples of where this pattern has been used. –Related Patterns: Similar patterns, patterns that can be used in conjunction with this pattern, when would you choose a similar pattern instead of this pattern. Describing a Design Pattern [2]

17. 17 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Coarse-grain Time-multiplexing Template Specialization Example Design Pattern

18. 18 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Coarse-grain Time-Multiplexing M2 M1 AB M3 A M1M2 M3Temp B M1M2 M3Temp Configuration 1 Configuration 2

19. 19 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Name: Coarse-grained Time-Multiplexing Intent: Enable a design that is too large to fit on a chip all at once to run as multiple subcomponents Motivation: Method to share limited fixed resources to implement a design that is too large as a whole. Coarse-grain Time-Multiplexing

20. 20 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Applicability (Requirements): –Configuration can be done on large time scale –No feedback loops in computation –Feedback loop only spans the current configuration –Feedback loop is very slow Participants: –Computational graph –Control algorithm Collaborations: Control algorithm manages when sub-graphs are loaded onto the device Coarse-grain Time-Multiplexing

21. 21 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Consequences: Often platforms take millions of cycles to reconfigure –Need an app that will run for 10’s of millions of cycles before needing to reconfigure –May need large buffers to store data during a reconfiguration Known Uses: –Video processing pipeline [Villasenor] “Video Communications using Rapidly Reconfigurable Hardware”, Transactions on Circuits and Systems for Video Technology 1995 –Automatic Target Recognition [[Villasenor] “Configurable Computer Solutions for Automatic Target Recognition”, FCCM 1996 Coarse-grain Time-Multiplexing

22. 22 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Implementation: –Break design into multiple sub graphs that can be configured onto the platform in sequence –Design a controller to orchestrate the configuration sequencing –Take steps to minimize configuration time Related patterns: –Streaming Data –Queues with Back-pressure Coarse-grain Time-Multiplexing

23. 23 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Coarse-grain Time-Multiplexing M2 M1 AB M3 A M1M2 M3Temp B M1M2 M3Temp Configuration 1 Configuration 2

24. 24 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Coarse-grain Time-Multiplexing M2 M1 AB M3 A M1M2 M3Temp B M1M2 M3Temp Configuration 1 Configuration 2 Assume: 1.) reconfiguration take10 thousand clocks 2.) 100 MHz clock 3.) We need to process for 100x the time spent in reconfiguration to get needed speed up. 4. A and B each produce one byte per clock

25. 25 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Coarse-grain Time-Multiplexing M2 M1 AB M3 A M1M2 M3Temp B M1M2 M3Temp Configuration 1 Configuration 2 What constraint does this place on Temp? Assume: 1.) reconfiguration take10 thousand clocks 2.) 100 MHz clock 3.) We need to process for 100x the time spent in reconfiguration to get needed speed up. 4. A and B each produce one byte per clock What if the data path is changed from 8-bit to 64-bit? 1 MB buffer 8 MB buffer Likely need off chip memory

26. 26 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Template Specialization Empty LUTs C(3) -------- LUT C(2) -------- LUT C(1) -------- LUT C(0) -------- LUT A(1) A(0) Mult by 3 C(3) 00010001 LUT C(2) 00100010 LUT C(1) 01100110 LUT C(0) 01010101 LUT A(1) A(0) Mult by 5 C(3) 00110011 LUT C(2) 01010101 LUT C(1) 00110011 LUT C(0) 01010101 LUT A(1) A(0) 03690369 0 5 10 15

27. 27 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Name: Template Specialization Intent: Reduce the size or time needed for a computation. Motivation: Use early-bound data and slowly changing data to reduce circuit size and execution time. Template Specialization

28. 28 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Applicability: When circuit specialization can be adapted quickly –Example: Can treat LUTs as small memories that can be written. No interconnect modifications Participants: –Template cell: Contains specialization configuration –Template filler: Manages what and how a configuration is written to a Template cell Collaborations: Template filler manages Template cell Template Specialization

29. 29 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Consequences: Can not optimize as much as when a circuit is fully specialize for a given instance. Overhead need to allow template to implement several specializations. Known Uses: –Multiply-by-Constant –String Matching Implementation: Multiply-by-Constant –Use LUT as memory to store answer –Use controller to update this memory when a different constant should be used. Template Specialization

30. 30 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Related patterns: –CONSTRUCTOR –EXCEPTION –TEMPLATE Template Specialization

31. 31 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Template Specialization Empty LUTs C(3) -------- LUT C(2) -------- LUT C(1) -------- LUT C(0) -------- LUT A(1) A(0) Mult by 3 C(3) 00010001 LUT C(2) 00100010 LUT C(1) 01100110 LUT C(0) 01010101 LUT A(1) A(0) Mult by 5 C(3) 00110011 LUT C(2) 01010101 LUT C(1) 00110011 LUT C(0) 01010101 LUT A(1) A(0) 03690369 0 5 10 15

32. 32 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Template Specialization Mult by 3 C(3) 00010001 LUT C(2) 00100010 LUT C(1) 01100110 LUT C(0) 01010101 LUT A(1) A(0) 03690369 Multiply by a constant of 2: Support inputs of 0 - 7

33. 33 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Template Specialization Mult by 3 C(3) 00010001 LUT C(2) 00100010 LUT C(1) 01100110 LUT C(0) 01010101 LUT A(1) A(0) 03690369

34. 34 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Template Specialization Mult by 3 00010001 LUT 00100010 01100110 01010101 A(1) A(0) 03690369 Mult by 2 C(3) 0000111100001111 LUT C(2) LUT C(1) LUT C(0) LUT A(1) A(0) 0 2 4 6 8 10 12 14 A(2) 0011001100110011 0101010101010101 0000000000000000

35. 35 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Catalog of Patterns (Just a start) [2] [2] Identifies 89 patterns Area-Time Tradeoff –Basic (implementation): Coarse-grain Time-Multiplex –Parallel (Expression): Dataflow, Data Parallel –Parallel (Implementation): SIMD, Communicating FSM Reducing Area or Time –Ruse Hardware (implementation): Pipelining –Specialization (Implementation): Template Communications –Layout (Expression/Implementation): Systolic Memory Numbers and Functions

36. 36 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Catalog of Patterns (Just a start) [2] [2] Identifies 89 patterns Area-Time Tradeoff –Basic (implementation): Coarse-grain Time-Multiplex –Parallel (Expression): Dataflow, Data Parallel –Parallel (Implementation): SIMD, Communicating FSM Reducing Area or Time –Ruse Hardware (implementation): Pipelining –Specialization (Implementation): Template Communications –Layout (Expression/Implementation): Systolic Memory Numbers and Functions

37. 37 - CPRE 583 (Reconfigurable Computing): Design Patterns Iowa State University (Ames) Next Lecture Continue Compute Models