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High Speed Digital Systems Lab June 2008 Acceleration of Economic Calculation Developers: Ayal Ozer and Eyal Efrat Mentor: Michael Yampolsky Black & Scholes.

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Presentation on theme: "High Speed Digital Systems Lab June 2008 Acceleration of Economic Calculation Developers: Ayal Ozer and Eyal Efrat Mentor: Michael Yampolsky Black & Scholes."— Presentation transcript:

1 High Speed Digital Systems Lab June 2008 Acceleration of Economic Calculation Developers: Ayal Ozer and Eyal Efrat Mentor: Michael Yampolsky Black & Scholes model Acceleration

2 Motivation Motivation Theoretic Background Theoretic Background Project Objectives Project Objectives Method of Operation Method of Operation System Inputs & Outputs System Inputs & Outputs System performance System performance Hardware vs. Software Hardware vs. Software Benchmark Benchmark Time Table Time Table Acceleration of Economic Calculation Agenda

3 World trade is more dynamic World trade is more dynamic There ’ s too much data to process in standard Hardware & Software There ’ s too much data to process in standard Hardware & Software Acceleration of Economic Calculation Motivation Because time is money!

4 What is an option? What is an option? Which options are we going to work with? Which options are we going to work with? What is the Black & Scholes model? What is the Black & Scholes model? Acceleration of Economic Calculation Theoretic Background

5 Real time B&S calculation provides a great advantage in capital markets Real time B&S calculation provides a great advantage in capital markets Using specialized hardware could accelerate the calculation time of the B&S value by a factor of hundreds Using specialized hardware could accelerate the calculation time of the B&S value by a factor of hundreds Acceleration of Economic Calculation Project Objectives

6 Acceleration of Economic Calculation Modus operandi – method of operation Compute the Black & Scholes value of the options in the MAOF index using a hi-speed FPGA and parallelizing the calculation process Compute the Black & Scholes value of the options in the MAOF index using a hi-speed FPGA and parallelizing the calculation process Create a user interface which will display a table with live data and the B&S value of each option. Create a user interface which will display a table with live data and the B&S value of each option.

7 Acceleration of Economic Calculation System Inputs INPUT Financial info about options of the MAOF http://www.tase.co.il http://www.tase.co.il Financial server Financial serverOUTPUT B&S calculation for the options B&S calculation for the options The difference between the option and it ’ s B&S value The difference between the option and it ’ s B&S value

8 Acceleration of Economic Calculation System Performance The name of the game is SPEED The name of the game is SPEED The calculation must be quick, hence the choice of a high speed FPGA platform. The calculation must be quick, hence the choice of a high speed FPGA platform. The aim is to increase calculation speed by a factor of hundreds. The aim is to increase calculation speed by a factor of hundreds.

9 Acceleration of Economic Calculation Hardware vs. Software The B&S model will be initially be calculated by software using C++ The B&S model will be initially be calculated by software using C++ The B&S model will then be implemented using an Altera Startix II FPGA mounted on a GiDEL ProcStar II board. The B&S model will then be implemented using an Altera Startix II FPGA mounted on a GiDEL ProcStar II board.

10 Acceleration of Economic Calculation Benchmark FPGA Software Test vector = ?

11 Acceleration of Economic Calculation Time Table

12 Acceleration of Economic Calculation Questions?


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