1. FPGA Based System Design Dr. Nazar Abbas Saqib NUST Institute of Information Technology (NIIT) Lecture 2: Programming Technolgies nazar@niit.edu.pk

2. We will discuss.. Introduction to FPGAs Programming Technologies The Design Warrior’s Guide to FPGAs Devices, Tools, and Flows. ISBN 0750676043 Copyright © 2004 Mentor Graphics Corp. (www.mentor.com) Pl note the source of the figures included in this lecture:

3. Field Programmable Gate Arrays (FPGAs) FPGAs are digital integerated circuits (ICs) that contain configurable (programmable) logic blocks of logic alongwith configurable interconnects between thes blocks The “field programmable” portion of the name refers that it can be programmed “in the filed” and not hard wired. If a device is being programmed while remaing resident in a system, it is termed as “In System Programmable (ISP) What distinguihes an FPGA from an ASIC is …something that resides in its name “Field Programmable Gate Arrays”

4. We will discuss..

5. A boring circuit…

6. Fusible Link Technology First technique that allowed users to program their devices Devices come with all links in place-each link is referred to as fuse Fuses can be selectively removed by applying pulses of high voltage and current

7. Fusible Link Technology Example: Programming for y= a & !b

8. AntiFuse Technology Each configurable path has an associated link called as antifuse In unprogrammed state, antifuse offer high resistence ‘open circuit’ Antifuses can be selectively grown by applying pulses of high voltage and current

9. AntiFuse Technology Example: Programming for y= !a & b

10. AntiFuse Technology Growing an antifuse

11. Mask Programmed Devices A single photomask is used to define which cells are to include a mask programmed connection Fig: A transistor based mask programmed ROM cell

12. PROM (Programmable ROM) Fig: A transistor and fusible link based PROM cell In its unprogrammed state, all fusible links are in place thus pulling down the column line (data) to logic zero Fuses can be selectively removed by applying pulses of high voltage and current to place row line in active state, colum line (data) is pulled to logic 1

13. EPROM (Eraseable Programmable ROM) based Technologies EPROM transistor is similar to standard MOS transistor with addition of a floating gate In its unprogrammed state, floating gate does not effect the operation of control gate To program, high voltage is supplied b/w gate and drain terminal that causes the transistor on and also energetic electrons to flow through floating gate, now even a progam signal is removed-a negative charge remains at floating gate-it is enough stable and can be erased through ultravoilet reays

14. The Design Warrior’s Guide to FPGAs Devices, Tools, and Flows. ISBN 0750676043 Copyright © 2004 Mentor Graphics Corp. (www.mentor.com) Fig: An EPROM transistor based memory cell EPROM based Technology

15. E 2 PROM based Technology (Electrically Eraseable Programmable ROM ) An E 2 PROM cell is app 2.5 times larger than EPROM cell because it comprises two transisitors and there is a space between them An E 2 PROM cell is similar to EPROM cell in that it contains a floating gate. The oxide layer b/w two transistors is very thin. The second transistor can be used to erase the cell electrically

16. FLASH based Technology Similar to EPROM and E 2 PROM cell but with thinner oxide layer & with rapid erasure time

17. SRAM based Technology (Static RAM) Two version of semiconductor RAM DRAM (Dynamic RAM) DRAM cell comprises a transistor resistor pair which ccupy less silicon “Dynamic” because when capcitor loses charge, it requires to be periodically recharged-cost of refreshing is too high SRAM (Static RAM) Static because once a value has been loaded into an SRAM cell, it remains untill it get modified or power has been removed Modern FPGAs are based on SRAM based technology

18. Figure 2-13