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CP 208 Digital Electronics Class Lecture 6 March 4, 2009
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2 MOS Field-Effect Transistors (MOSFETs)
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In This Class We Will Discuss Following Topics: Chap 4 MOS Field-Effect Transistors 4.1 Device Structure and Physical Operation 4.2 Current-Voltage Characteristics 4.3 MOSFET Circuits at DC
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Introduction Three Terminal Device – (as seen in BJT) the Control Signal used on Two terminals can cause Current to Change on Third from Zero to Hi value (switch) – Similar concept for MOSFET Switch is Basis for Logic Inverter – basic Element of Digital Ckts/Electronics MOSFET can be made Smaller than BJT, and Manf. Process is simple and Require Lower P > 200 Mil MOSFETs on Single Chip Can be used as Amp and Dig Logic Inverter
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4.1.1 4.1.1 Physical STRUCTURE of Enhancement-type NMOS transistor: (a) perspective view; (b) cross- section. Typically L = 0.1 to 3 m, W = 0.2 to 100 m, and thickness of the oxide layer (t ox ) = 2 to 50 nm.
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4.1.2 No Gate Voltage Operation Two Back-to-Back Diodes in Series Between Drain and Source Prevent Current Flow between Drain and Source when v DS is Applied The path between Drain and Source has very High Resistance in the Order of 10 12 Ω
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4.1.3 Creating a Channel for Current Flow 4.1.3 Creating a Channel for Current Flow Positive Voltage to gate Repels (Pushes) Holes Down in Substrate and Attracts Electron. When sufficient number of electrons gather under Gate an n-region is created thereby an n channel is INDUCED under the gate. Now if v DS is applied current will flow in n-region (n-Channel)
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Note … Because of n-channel This MOSFET is called NMOS Transistor n-Channel (or Inversion Layer) created by inverting the p- type sub to n-type with application of Gate Voltage (Field) The value of v GS at which conducting channel is formed is called V t (Positive for n) V t is controlled during fabrication process and typically range from 0.5 to 1 V Gate and Channel form parallel plate capacitor (oxide as dielectric) creating the E filed in Vertical direction E field controls the Charge in Channel and thus determines the conductivity of channel
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4.1.4 Applying a Small v DS When a Small v DS is Applied along with v GS > V t NMOS acts as a resistor whose value is determined by v GS Specifically, the channel conductance is proportional to Excess Gate Voltage ( v GS – V t ), and thus i D is proportional to ( v GS – V t ) v DS. (Depletion region not shown)
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The i D – v DS characteristics of the MOSFET The i D – v DS characteristics of the MOSFET When voltage applied between drain and source, v DS, is kept small, device operates as a linear resistor whose value is controlled by v GS. The increase of v GS above V t Enhances the Channel, Hence Enhancement-mode or Enhancement-type MOSFET
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4.1.5 Operation as v DS is increased 4.1.5 Operation as v DS is increased. v GS is kept constant at a value > V t v DS appears as voltage drop across the channel L (voltage increases from 0 to v DS from S to D). Thus voltage between gate and points along channel decreases from v GS to v GS – v DS. Thus induced channel acquires a tapered shape, and its resistance increases as v DS is increased. And i D - v DS curve no longer straight line but bends – Next Figure
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When v DS increases to value so that voltage between gate and drain side of channel reaches V t – v GD = V t or v GS – v DS = V t or v DS = v GS – V t the channel depth at drain end is almost zero (or channel is pinched off) Increasing v DS beyond this has no effect on channel shape and i D stays constant
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Eventually, as v DS reaches v GS – V t’ the channel is pinched off at the drain end. Increasing v DS above v GS – V t has no effect on the channel’s shape and current saturates and MOSFET has entered Saturation Region. That is, v DSsat = v GS – V t Note That … For every value of v GS > V t there is corresponding v DSsat. Device in Saturation if v DS ≥ v DSsat
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4.1.6 Derivation of the i D – v DS Relationship
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4.1.7 p-Channel MOSFET (PMOS) Fabricated on n-type substrate with p + regions for D and S and p-channel is induced under gate Operates same way as n- channel device except v GS, V t and v DS are negative Also, i D enters S and leaves D Because NMOS can be made smaller and operate faster and use lower supply voltage than PMOS, it has virtually replaced PMOS
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In Next Class We Will Continue to Discuss: Chap 4 MOS Field-Effect Transistors
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