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1 Leveraging Multi-Core Processors in a CDMA-2000 SDR Base Station Steve Muir, John Chapin, Andrew Chiu, Victor Lum and Jeremy Nimmer Vanu, Inc. http://www.vanu.com 12 th Annual Workshop on High Performance Embedded Computing (HPEC) 23 rd – 25 th September, 2008 Lexington, MA Approved for public release; distribution is unlimited.
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2 Overview Software Defined Radio (SDR) - implementing radio systems entirely in software rather than traditional hardware (discrete, ASIC, FPGA) Vanu, Inc. – developing SDR since 1998 for commercial, government and military use Our philosophy is to use high-level languages and general purpose processors to achieve high performance and portability at low cost Current focus is the Anywave® multi-standard commercial SDR Both GSM and CDMA-2000 in a single platform Same approach applies from high capacity macrocells down to home femtocells Performance of a CDMA-2000 base station Moore’s Law continues to apply, yielding significant performance gains Benefits seen primarily in # of CPU cores, also new functional units, e.g., SIMD (vector) instruction units
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3 SDR capacity gains due to Moore’s Law CDMA2000 1xRTT RC3 voice channels processed per core (physical layer modules only)
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4 Summary Moore’s Law continues to deliver significant SDR performance growth Number of processing units (cores) is now the primary metric that improves SDR is a perfect candidate for running across multiple threads/cores Comparing apples-to-apples (single core with SSE2 vector unit, ICC): September 2003 6 CDMA voice channels April 200716 CDMA voice channels 3.5 years2.5x capacity increase PER CORE Number of cores in a cost-effective dual-CPU server September 20032 cores July 20088 cores (2x4, 12-core systems available by year end) 5 years4x – 6x ADDITIONAL INCREASE Use of portable software that leverages Moore’s Law offers significant benefits to vendors and users of SDR
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