1. Processor Organization and Architecture Module III

2. Control Unit

3. Control Unit Implementation Control unit implementations fall into one of two categories: Hardwired implementation Microprogrammed implementation

4. Hardwired implementation In this, the control unit is essentially a state machine circuit. Its input logic signals are transformed into a set of output logic signals, which are the control signals

5. Control Unit Inputs Inputs: – Instruction Register, Clock, – Flags & control bus signals (can be directly used) Instruction Register – Uses opcodes to perform different actions for different instruction – There should be unique logic input for each opcode : performed by decoder (n-bits  2 n outputs,each will activate a single unique output)

6. Control Unit Inputs Clock – CU requires different control signals at different time units and hence a timing generator is used

7. Control Unit with decoded inputs

8. Hardware Control Unit Design Consider the operation of the control unit – E.g. 2’s compliment multiplier

9. Control Unit for Multiplier

10. Hardware Control Unit Design List the control signals needed for the control unit. – A control signal is associated with each distinct action/operation. – A common control signal can be used for parallel operations – E.g. Control signals for 2’s compliment multiplier

11. Control Signals for Multiplier

12. Hardware Control Unit Design With this information, we can apply 4 design techniques for hardware implementation. The methods are: – State -table Method – Delay-element Method – Sequence-counter Method – PLA Method

13. State-table Method It is the standard algorithmic approach for sequential circuit design In this method every micro-operation block is associated with a state in state table for control circuit

14. Example of multiplier

16. State table for the control unit can be directly derived from the flowchart.

17. State table for Multiplier

19. State-table Method Once the state table is ready it can be implemented using JK flipflops. Advantages: – Simplest method to implement Disadvantages: – If there is large number of states and input combinations, the size of table becomes large and thus it will be difficult to implement

20. State-table Method Disadvantages: – State table hides useful information like loops and repeated patterns. Thus two states with same behavior may require different hardware. – Circuits designed tends to have a random structure and thus difficult to debug and maintain.

21. Delay-element Method Since the control signals are to be activated in a proper sequence, there is a specific time delay between activation of two conjugative control signals Thus a sequence of delay elements can be used to generate control signals To synchronize, the delay elements are made of D flipflops and controlled by common clock signal.

22. Delay-element Method A control unit using delay elements can be constructed directly from flowchart. It is also called one-shot method.

23. Rules to derive control circuit from flowchart Rule 1: – Each sequence of two successive micro-operations require a delay element. – The control signals are taken directly from input and output of delay element.

24. Rules to derive control circuit from flowchart Rule 1: – The signals for same control line are logically ORed to get one common output signal

25. Rules to derive control circuit from flowchart Rule 2: – The n lines from the flow chart merge to a common line are transformed into OR gate

26. Rules to derive control circuit from flowchart Rule 3: – A decision box is implemented by 2 AND gates

27. Delay-element Method- Multiplier

29. Delay-Element Method Advantage: – In case of loop, same hardware can be used and hence hardware requirement is less. Disadvantage: – No. of delay elements is equal to the no. of states, thus for lots of states circuit becomes large. – Synchronization becomes difficult, if there are lots of D-flipflops

30. Sequence-counter Method The sequence counter consist of – Modulo k- counter – 1/k decoder – Input signals to control the operation of counter

31. Sequence-counter Method When count enable input is connected to clock source, decoder generates k phase signals separated by one clock period

32. Sequence-counter Method Two input lines begin and end turn the counter on and off Begin causes the counter to begin End disconnects the clock and resets the counter

33. Sequence-counter Method The phase signal activates control lines for each micro-operation As instruction changes, micro-ops change which must activate another set of control lines To activate this, logic circuit is connected to the counter

34. Sequence-counter Method

35. Multiplier using Sequence Counter

37. Phase 1 Do initial Settings Step1: A  0 Q -1  0 COUNT  n B  INBUS Step2: Q  INBUS

38. Phase 2 Phase 2 is repeated n times and has 2 steps: Step 1: A  A – B or A  A+B and Step 2: Arithmetic Shift A, Q, Q -1 and Count  Count -1

39. Phase 3 Phase 3 involves 3 steps Step 1: OUTBUS  A Step 2: OUTBUS  Q Step 3: Activate END

40. Multiplier using Sequence Counter

42. Phase 1

43. Phase 2

44. Phase 3

45. Sequence-counter Method Advantage: – The use of hardware is minimal, hence suits large complex control circuits Disadvantage: – It is expensive for simple control circuits.

46. PLA Method For large control units VLSI Technology is used to design control units. E.g. PLA (Programmable Logic Array) PLA consists of an array of AND gates followed by an array of OR gates. It can be used to implement combinational logic functions of several variables

47. Blok Diagram of PLA

48. PLA Method We can give instruction code, contents of control step counter, flags and condition codes as input to PLA to get control signals as output.

49. PLA Method

50. Advantages of Hardwired Control Unit Works faster as combinational circuits generates control signals based on input status.

51. Disadvantages of Hardwired Control Unit Complex in design if it requires larger number of control points No flexibility : difficult to make corrections or to add a new feature Uses too many logic gates.