1. Aug 7, 2012 SPP/FIELDS 1 UCB Digital Receiver to replace LESIA TNR/HFR

2. Aug 7, 2012 Block diagram 2 SCM MF Output E-Field Antenna Preamps HF outputs feed Receiver

3. Aug 7, 2012 Dynamic Range 3 Pulupa – Aug, 2012

4. Aug 7, 2012 Preliminary Requirements Input levels –V1-V4 In the range ±5V Switchable gain on front end to accommodate wide dynamic range and uncertainty in signal levels (TBD, Gain in Preamp preferred) Dynamic Range for Receiver input and ADC –At Preamp Input, ranges from < 10µV to < 10mV (TBR) –Preamp will boost signal, so Receiver will input signal modified by the Preamp transfer function plus noise Noise level –At Preamp input: < 10nV / √Hz –Receiver must preserve this low noise floor (again modified by Preamp) –B-HF Frequency range 10kHz to 1MHz (SCM HF winding) –Voltage range: ±8.5V Switchable gain on front end to accommodate wide dynamic range and uncertainty in signal levels (TBD) 4

5. Aug 7, 2012 Data Products Signal Processing –TNR Spectra V1, V2, V3, V4, V1-V2, V3-V4, B-HF Log-spaced frequencies, Δf/f = 4% (perhaps higher resolution) Picket fence, avoid frequencies f+Nf, starting at 150kHz, f=50kHz (or 150kHz) Cadence: TBD –TNR Cross Spectra (direction finding) V1 and V2, V3 and V4, V x B Cadence: TBD –HFR Spectra (And cross spectra?) V1, V2, V3, V4, V1-V2, V3-V4 Frequency resolution: –1MHz to 5MHz: 50kHz spacing (TBR) –5MHz to 20MHz: 100kHz spacing (TBR) Bandwidth: 25kHz (TBR) Picket fence Cadence: TBD 5

6. Aug 7, 2012 Signal Processing Chain Development Plan –Build Test Bed for Algorithm development and verification Hi speed ADC for signal capture, connected to laptop Acquire data set using STEREO S/WAVES Antennas/Preamp Can add impulsive events to time series, simulate anticipated dust signatures Develop algorithms in Software, then transfer to VHDL and/or FSW Include hi speed DAC to play data through Receiver –ETU build prior to iPDR 6