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Chapter One Introduction to Pipelined Processors.

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Presentation on theme: "Chapter One Introduction to Pipelined Processors."— Presentation transcript:

1 Chapter One Introduction to Pipelined Processors

2 Pipelining It is a technique of decomposing a sequential process into sub-operations which can be executed in a special dedicated segment that operates concurrently with all other segments It improves processor performance by overlapping the execution of multiple instructions

3 Example

4 Pipelining: Its Natural! Laundry Example Ann, Brian, Cathy, Dave each have one load of clothes to wash, dry, and fold Washer takes 30 minutes Dryer takes 40 minutes Folder takes 20 minutes ABCD

5 Sequential Laundry Sequential laundry takes 6 hours for 4 loads If they knew pipelining, how fast their laundry would be? ABCD 304020304020304020304020 6 PM 789 10 11 Midnight TaskOrderTaskOrder Time

6 Pipelined Laundry starts work ASAP Pipelined laundry takes 3.5 hours for 4 loads ABCD 6 PM 789 10 11 Midnight TaskOrderTaskOrder Time 3040 20

7 Observations on Pipeline Processing It works well if time taken by each stage is nearly the same – If this time is T seconds, then the pipeline produces output at every T seconds – If time taken by each stage varies, then the slower stage becomes a bottleneck in the progress

8 Suppose each stage takes 30 minutes Time to wash, dry, and fold one load is still the same (90 minutes) Then the work will get over in 3 hours Pipelined Laundry Time 6 PM A 30 789 PM B 30 C D

9 Pipelined Laundry Here 40 minutes takes over the pipeline cycle ABCD 6 PM 789 10 11 Midnight TaskOrderTaskOrder Time 3040 20

10 Example for pipeline in computer Consider that the process of execution of an instruction involves four major steps: 1.Instruction Fetch (IF): from main memory 2.Instruction Decoding (ID): which identifies the operation to be performed 3.Operand Fetch(OF): if needed in execution 4.Execution(EX): of the decoded arithmetic/logic operation

11 Example for pipeline in computer In a non-pipelined computer, these four steps must be completed before the next instruction can be issued

12 Example for pipeline in computer In a pipelined computer, successive stages are executed in an overlapped fashion

13 Example for pipeline in computer Theoretically a k-stage linear pipeline could be k-times faster. But this ideal speedup cannot be achieved due to factors like : – Data dependency – Branch and Interrupts

14 Principles of Linear Pipelining

15 In pipelining, we divide a task into set of subtasks. The precedence relation of a set of subtasks {T 1, T 2,…, T k } for a given task T implies that the same task T j cannot start until some earlier task T i finishes. The interdependencies of all subtasks form the precedence graph.

16 Principles of Linear Pipelining With a linear precedence relation, task T j cannot start until earlier subtasks { T i } for all (i < j) finish. A linear pipeline can process subtasks with a linear precedence graph.

17 Principles of Linear Pipelining A pipeline which can process successive subtasks if Subtasks have linear precedence order Each subtasks take nearly same time to complete

18 Basic Linear Pipeline L: latches, interface between different stages of pipeline S1, S2, etc. : pipeline stages

19 Basic Linear Pipeline It consists of cascade of processing stages. Stages : Pure combinational circuits performing arithmetic or logic operations over the data flowing through the pipe. Stages are separated by high speed interface latches. Latches : Fast Registers holding intermediate results between stages Information Flow are under the control of common clock applied to all latches

20 Basic Linear Pipeline L: latches, interface between different stages of pipeline S1, S2, etc. : pipeline stages

21 Basic Linear Pipeline The flow of data in a linear pipeline having four stages for the evaluation of a function on five inputs is as shown below:

22 Basic Linear Pipeline The vertical axis represents four stages The horizontal axis represents time in units of clock period of the pipeline.

23 Clock Period (τ) for the pipeline Let τ i be the time delay of the circuitry S i and t 1 be time delay of latch. Then the clock period of a linear pipeline is defined by The reciprocal of clock period is called clock frequency (f = 1/τ) of a pipeline processor.

24 Performance of a linear pipeline Consider a linear pipeline with k stages. Let T be the clock period and the pipeline is initially empty. Starting at any time, let us feed n inputs and wait till the results come out of the pipeline. First input takes k periods and the remaining (n-1) inputs come one after the another in successive clock periods. Thus the computation time for the pipeline T p is T p = kT+(n-1)T = [k+(n-1)]T

25 Performance of a linear pipeline For example if the linear pipeline have four stages with five inputs. Tp = [k+(n-1)]T = [4+4]T = 8T

26 Performance Parameters The various performance parameters of pipeline are : 1.Speed-up 2.Throughput 3.Efficiency

27 Speedup Speedup is defined as Speedup = Time taken for a given computation by a non-pipelined functional unit Time taken for the same computation by a pipelined version Assume a function of k stages of equal complexity which takes the same amount of time T. Non-pipelined function will take kT time for one input. Then Speedup = nkT/(k+n-1)T = nk/(k+n-1)


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