1. PCI coreGlue logic SIU card PCI bus FPGA APEX20k400 internal SRAM I/O onboard SRAM 32k x 16 FLASH EEPROM FEE-bus daughter board TPC RCU prototype I Commercial OEM-PCI board –ALTERA FPGA APEX EP20K400 –SRAM 32k x 16 –PMC I/O connectors (178 pins) –Buffered I/O (80 pins) PMC FEE boardstrigger

2. PCI coreGlue logic SIU-CMC interface SIU card PCI bus FPGA internal SRAM Memory D32  2 MB Memory D32 > 2 MB FLASH EEPROM SCTTCFEE- bus TPC RCU prototype II

3. RCU test system PCI bridge SIU interface PCI bus FPGA SRAM LINUX: DATE PCI-tools SIU PCI bridge Glue logic DIU interface PCI bus LINUX: DATE PCI-tools DIU FEE- bus Trigger FEE-boards DDL RCU pRORC

4. Programming model Data/Command path Message passing model Production version DATE PCI-tools API LINUX-driver PCI core mailboxes fifos DIU command decoder SIU command decoder RCU command decoder RCU SM DDL protocol FEE command (”blabla_ALTRO”,,,) Design phase Prototype Final version

5. Programming model Data/Command path Message passing via PCI Development version DATE PCI-tools API LINUX-driver PCI core mailboxes fifos SIU command decoder RCU SIU emulator DDL RCU FEE controller FEE bus Design phase Prototype Final version ALTRO