1. ECE 6130: ADVANCED VLSI DESIGNECE 6130: ADVANCED VLSI DESIGN Dr Shafaat Ahmed HEC Foreign Professor Center for Advanced Studies in Engineering, Islamabad, Pakistan Assignment # 2 Guidelines: – Each assignment carries 25 marks. – There is no unique solution to these assignments. Marks will be assigned according to the originality of your comments. Your comments may be wrong but should highlight your understanding on the issue. – Cover page with group number and member names and CASE logo (take from CASE website) –Reports should be 1 page (including images) as per IEEE guidelines to write Journal papers. – Support your description with developed diagrams – Submission date: October 4, 2012 (on my email sabazazgiki@gmail.com by 3:00 pm)

2. Assignment # 2 Assignment 2a: Convert the logic diagram in equivalent NAND- NOR gates and how the circuit diagram in terms of nFETs and pFETs using structured design technique. Assignment 2b: Draw the circuit diagram in terms of nFETs and pFETs for SR Latch Assignment 2c: Draw the circuit diagram in terms of nFETs and pFETs for D Latch Assignment 2d: Implement the design using structured design technique while adding any logic gate additional logic Assignment 2e: This is another way of implementing XOR gate using NAND gates. Implement this and give comparison with the one shown in Chapter 2 of the text book

3. Groups Group 1: Syed Farhan Raza Naqvi (razafarhan@gmail.com), Hassan Javed (engr.hassanjaved@gmail.com) Assignment 2a Group 2: Umar Saleem Butt (umar.saleem61@yahoo.com), M. Kazim Hafeez (kazimhafeez@yahoo.com) Assignment 2c Group 3: Hafiz Shakeel Ahmad (shafizshakeelahmad@yahoo.com), Emad Majeed (emad_18@ymail.com) Assignment 2b Group 4: Ahmad Mustafa Athar (ahmadathar01@gmail.com), Muhammad Raza Khalid Saleemi (rks143@gmail.com) Assignment 2e Group 5: Usman rasheed (usmanrasheed82@gmail.com), Ehsanullah (ehsan_ullah_hassani@yahoo.com) Assignment 2d Group 6: MUHAMMAD ABDUL AHAD KHAN (maak_pk@hotmail.com), SAYED ABRAR HUSSAIN (abrarforyou@gmail.com) Assignment 2b