1. CHARLES UNIVERSITY IN PRAGUE http://d3s.mff.cuni.cz/~jezek faculty of mathematics and physics Principles of Computers 18 th Lecture Pavel Ježek, Ph.D. pavel.jezek@d3s.mff.cuni.cz

2. How To Write/Compile Complex Expressions? x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x;

3. Rewriting Complex Expressions – Step 1: Function Calls As Separate Commands, Each Having Variables and Constants As Arguments Only (i.e. No Expressions As Arguments) temp11 := b + c; temp12 := F1(temp11); temp21 := F3(2, 3); temp22 := d + e + temp21; temp23 := F4(4); temp24 := f + temp23; temp25 := F2(temp22, temp24); temp31 := F5(5); x := 1 + a + temp12 * temp25 + temp31 + x; x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; Introducing temporary variables to hold intermediate results of inner subexpressions

4. Step 2: Rewrite To Have a := b op c Or d := F(…) Only temp11 := b + c; temp12 := F1(temp11); temp21 := F3(2, 3); temp22 := d + e; temp22 := temp22 + temp21; temp23 := F4(4); temp24 := f + temp23; temp25 := F2(temp22, temp24); temp31 := F5(5); tempX := 1 + a; temp4 := temp12 * temp25; tempX := tempX + temp4; tempX := tempX + temp31; x := tempX + x; temp11 := b + c; temp12 := F1(temp11); temp21 := F3(2, 3); temp22 := d + e + temp21; temp23 := F4(4); temp24 := f + temp23; temp25 := F2(temp22, temp24); temp31 := F5(5); x := 1 + a + temp12 * temp25 + temp31 + x; x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x;

5. Step 3 (If Target CPU Does Not Support a := b op c): a := a + b temp11 := b; temp11 := temp11 + c; temp12 := F1(temp11); temp21 := F3(2, 3); temp22 := d; temp22 := temp22 + e; temp22 := temp22 + temp21; temp23 := F4(4); temp24 := f; temp24 := temp24 + temp23; temp25 := F2(temp22, temp24); temp31 := F5(5); tempX := 1{ x := 1 + a + temp12 * temp25 + temp31 + x; } tempX := tempX + a; temp4 := temp12; temp4 := temp4 * temp25; tempX := tempX + temp4; tempX := tempX + temp31; tempX := tempX + x; x := tempX; OR x := x + tempX; temp11 := b + c; temp12 := F1(temp11); temp21 := F3(2, 3); temp22 := d + e; temp22 := temp22 + temp21; temp23 := F4(4); temp24 := f + temp23; temp25 := F2(temp22, temp24); temp31 := F5(5); x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; tempX := 1 + a; temp4 := temp12 * temp25; tempX := tempX + temp4; tempX := tempX + temp31; x := tempX + x;

6. Step 4: Rewriting Function Calls – Expecting Calling Convention With Arguments Passed On Stack x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; temp11 := b; temp11 := temp11 + c; push temp11 call F1 temp12 := returnValue; push 3 push 2 call F3 temp21 := returnValue; temp22 := d; temp22 := temp22 + e; temp22 := temp22 + temp21; push 4 call F4 temp23 := returnValue; temp24 := f; temp24 := temp24 + temp23; push temp24 push temp22 call F2 temp25 := returnValue; push 5 call F5 temp31 := returnValue; tempX := 1 tempX := tempX + a; temp4 := temp12; temp4 := temp4 * temp25; tempX := tempX + temp4; tempX := tempX + temp31; tempX := tempX + x; x := tempX;

7. Step 5: Rewrite Operations Unsupported by Target CPU into Calls to Runtime x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; temp11 := b; temp11 := temp11 + c; push temp11 call F1 temp12 := returnValue; push 3 push 2 call F3 temp21 := returnValue; temp22 := d; temp22 := temp22 + e; temp22 := temp22 + temp21; push 4 call F4 temp23 := returnValue; temp24 := f; temp24 := temp24 + temp23; push temp24 push temp22 call F2 temp25 := returnValue; push 5 call F5 temp31 := returnValue; tempX := 1 tempX := tempX + a; push temp12 temp4 := temp12; push temp25 temp4 := temp4 * temp25; call runtimeMultiply temp4 := returnValue tempX := tempX + temp4; tempX := tempX + temp31; tempX := tempX + x; x := tempX;

8. x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; LDA &b temp11 := b; ADC &c temp11 := temp11 + c; PHA push temp11 JSR &F1 call F1 STA &temp12temp12 := returnValue; LDA #3 push 3 PHA LDA #2 push 2 PHA JSR &F3 call F3 STA &temp21 temp21 := returnValue; LDA &d temp22 := d; ADC &e temp22 := temp22 + e; ADC &temp21 temp22 := temp22 + temp21; STA &temp22 LDA #4 push 4 PHA JSR &F3 call F4 STA &temp23 temp23 := returnValue; LDA &f temp24 := f; ADC &temp23 temp24 := temp24 + temp23; PHA push temp24 LDA &temp22 push temp22 PHA JSR &f2 call F2 STA &temp25temp25 := returnValue; LDA #5 push 5 PHA JSR &F5 call F5 STA &temp31temp31 := returnValue; LDA #1tempX := 1 ADC &atempX := tempX + a; TAY save tempX into Y reg. LDA &temp12 temp4 := temp12; PHA LDA &temp25 temp4 := temp4 * temp25; PHA JSR &runtimeMultiply call Pascal runtime STA &temp4 TYA restore tempX from Y ADC &temp4tempX := tempX + temp4; ADC &temp31tempX := tempX + temp31; ADC &xtempX := tempX + x; STA &xx := tempX; Passing all return values in A register Target CPU: 6502 x := 1 + a + temp12 * temp25 + temp31 + x; If temp* is part of arithmetic operation, it needs to be loaded into A

9. LDA &b temp11 := b; CLC ADC &c temp11 := temp11 + c; PHA push temp11 JSR &F1 call F1 STA &temp12temp12 := returnValue; LDA #3 push 3 PHA LDA #2 push 2 PHA JSR &F3 call F3 STA &temp21 temp21 := returnValue; LDA &d temp22 := d; CLC ADC &e temp22 := temp22 + e; CLC ADC &temp21 temp22 := temp22 + temp21; STA &temp22 LDA #4 push 4 PHA JSR &F3 call F4 STA &temp23 temp23 := returnValue; LDA &f temp24 := f; CLC ADC &temp23 temp24 := temp24 + temp23; PHA push temp24 LDA &temp22 push temp22 PHA JSR &f2 call F2 STA &temp25temp25 := returnValue; LDA #5 push 5 PHA JSR &F5 call F5 STA &temp31temp31 := returnValue; LDA #1tempX := 1 CLC ADC &atempX := tempX + a; TAY save tempX into Y reg. LDA &temp12 temp4 := temp12; PHA LDA &temp25 temp4 := temp4 * temp25; PHA JSR &runtimeMultiply call Pascal runtime STA &temp4 TYA restore tempX from Y CLC ADC &temp4tempX := tempX + temp4; CLC ADC &temp31tempX := tempX + temp31; CLC ADC &xtempX := tempX + x; STA &xx := tempX; x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; Fix 8-bit Additions

10. TSXallocate 7 one byte temps TXA SEC SBC #7 TAX TXS LDA &b temp11 := b; CLC ADC &c temp11 := temp11 + c; PHA push temp11 JSR &F1 call F1 STA &temp12temp12 := returnValue; LDA #3 push 3 PHA LDA #2 push 2 PHA JSR &F3 call F3 STA &temp21 temp21 := returnValue; LDA &d temp22 := d; CLC ADC &e temp22 := temp22 + e; CLC ADC &temp21 temp22 := temp22 + temp21; STA &temp22 LDA #4 push 4 PHA JSR &F3 call F4 STA &temp23 temp23 := returnValue; LDA &f temp24 := f; CLC ADC &temp23 temp24 := temp24 + temp23; PHA push temp24 LDA &temp22 push temp22 PHA JSR &f2 call F2 STA &temp25temp25 := returnValue; LDA #5 push 5 PHA JSR &F5 call F5 STA &temp31temp31 := returnValue; LDA #1tempX := 1 CLC ADC &atempX := tempX + a; TAY save tempX into Y reg. LDA &temp12 temp4 := temp12; PHA LDA &temp25 temp4 := temp4 * temp25; PHA JSR &runtimeMultiply call Pascal runtime STA &temp4 TYA restore tempX from Y CLC ADC &temp4tempX := tempX + temp4; CLC ADC &temp31tempX := tempX + temp31; CLC ADC &xtempX := tempX + x; STA &xx := tempX; TSXfree 7 one byte temps TXA CLC ADC #7 TAX TXS x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; Allocate space for 7 temporary variables on stack

11. TSXallocate 7 one byte temps TXA SEC SBC #7 TAX TXS LDA &b temp11 := b; CLC ADC &c temp11 := temp11 + c; PHA push temp11 JSR &F1 call F1 TSX remove arguments from stack INX TXS STA &temp12temp12 := returnValue; LDA #3 push 3 PHA LDA #2 push 2 PHA JSR &F3 call F3 TSX remove arguments from stack INX TXS STA &temp21 temp21 := returnValue; LDA &d temp22 := d; CLC ADC &e temp22 := temp22 + e; CLC ADC &temp21 temp22 := temp22 + temp21; STA &temp22 LDA #4 push 4 PHA JSR &F3 call F4 TSX remove arguments from stack INX TXS STA &temp23 temp23 := returnValue; LDA &f temp24 := f; CLC ADC &temp23 temp24 := temp24 + temp23; PHA push temp24 LDA &temp22 push temp22 PHA JSR &f2 call F2 TSX remove arguments from stack INX TXS STA &temp25temp25 := returnValue; LDA #5 push 5 PHA JSR &F5 call F5 TSX remove arguments from stack INX TXS STA &temp31temp31 := returnValue; LDA #1tempX := 1 CLC ADC &atempX := tempX + a; TAY save tempX into Y reg. LDA &temp12 temp4 := temp12; PHA LDA &temp25 temp4 := temp4 * temp25; PHA JSR &runtimeMultiply call Pascal runtime STA &temp4 TSX remove arguments from stack INX TXS TYA restore tempX from Y CLC ADC &temp4tempX := tempX + temp4; CLC ADC &temp31tempX := tempX + temp31; CLC ADC &xtempX := tempX + x; STA &xx := tempX; TSXfree 7 one byte temps TXA CLC ADC #7 TAX TXS x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; Passing all return values in A register Removing arguments from stack

12. TSXallocate 7 one byte temps TXA SEC SBC #7 TAX TXS LDA &b temp11 := b; CLC ADC &c temp11 := temp11 + c; PHA push temp11 PHA reserve space for return value by pushing dummy value JSR &F1 call F1 TSX LDA $101,X save return value into A INX remove return value from stack INX remove arguments from stack TXS STA &temp12temp12 := returnValue; LDA #3 push 3 PHA LDA #2 push 2 PHA JSR &F3 call F3 TSX remove arguments from stack INX TXS STA &temp21 temp21 := returnValue; LDA &d temp22 := d; CLC ADC &e temp22 := temp22 + e; CLC ADC &temp21 temp22 := temp22 + temp21; STA &temp22 LDA #4 push 4 PHA JSR &F3 call F4 TSX remove arguments from stack INX TXS STA &temp23 temp23 := returnValue; LDA &f temp24 := f; CLC ADC &temp23 temp24 := temp24 + temp23; PHA push temp24 LDA &temp22 push temp22 PHA JSR &f2 call F2 TSX remove arguments from stack INX TXS STA &temp25temp25 := returnValue; LDA #5 push 5 PHA JSR &F5 call F5 TSX remove arguments from stack INX TXS STA &temp31temp31 := returnValue; LDA #1tempX := 1 CLC ADC &atempX := tempX + a; TAY save tempX into Y reg. LDA &temp12 temp4 := temp12; PHA LDA &temp25 temp4 := temp4 * temp25; PHA JSR &runtimeMultiply call Pascal runtime STA &temp4 TSX remove arguments from stack INX TXS TYA restore tempX from Y CLC ADC &temp4tempX := tempX + temp4; CLC ADC &temp31tempX := tempX + temp31; CLC ADC &xtempX := tempX + x; STA &xx := tempX; TSXfree 7 one byte temps TXA CLC ADC #7 TAX TXS x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; Passing return value on stack for F1, and in accumulator for F2, F3, F4, F5... ??$01EC ??$01EB ??$01EA ??$01E9 ↔ temp ??$01E8 ↔ temp ??$01E7 ↔ temp ??$01E6 ↔ temp ??$01E5 ↔ temp ??$01E4 ↔ temp ??$01E3 ↔ temp $100+S+2a1 $01E2 ↔ 1st argument $100+S+1r $01E1 ↔ return value S($E0) →??$01E0 ??$01DF...

13. TSXallocate 7 one byte temps TXA SEC SBC #7 TAX TXS LDA &b temp11 := b; CLC ADC &c temp11 := temp11 + c; PHA push temp11 PHA reserve space for return value by pushing dummy value JSR &F1 call F1 TSX LDA $101,X save return value into A INX remove return value from stack INX remove arguments from stack TXS STA $107,X temp12 := returnValue; LDA #3 push 3 PHA LDA #2 push 2 PHA JSR &F3 call F3 TSX remove arguments from stack INX TXS STA $106,X temp21 := returnValue; LDA &d temp22 := d; CLC ADC &e temp22 := temp22 + e; CLC ADC $106,X temp22 := temp22 + temp21; STA $105,X LDA #4 push 4 PHA JSR &F3 call F4 TSX remove arguments from stack INX TXS STA $104,X temp23 := returnValue; LDA &f temp24 := f; CLC ADC $104,X temp24 := temp24 + temp23; PHA push temp24 LDA $105,X push temp22 PHA JSR &f2 call F2 TSX remove arguments from stack INX TXS STA $103,X temp25 := returnValue; LDA #5 push 5 PHA JSR &F5 call F5 TSX remove arguments from stack INX TXS STA $102,Xtemp31 := returnValue; LDA #1tempX := 1 CLC ADC &atempX := tempX + a; TAY save tempX into Y reg. LDA $107,X temp4 := temp12; PHA LDA $103,X temp4 := temp4 * temp25; PHA JSR &runtimeMultiply call Pascal runtime STA $101,X TSX remove arguments from stack INX TXS TYA restore tempX from Y CLC ADC $101,X tempX := tempX + temp4; CLC ADC $102,X tempX := tempX + temp31; CLC ADC &xtempX := tempX + x; STA &xx := tempX; TSXfree 7 one byte temps TXA CLC ADC #7 TAX TXS x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; Assign memory locations to temporary variables... ??$01EC ??$01EB ??$01EA +7??$01E9 ↔ temp12 +6??$01E8 ↔ temp21 +5??$01E7 ↔ temp22 +4??$01E6 ↔ temp23 +3??$01E5 ↔ temp25 +2??$01E4 ↔ temp31 +1??$01E3 ↔ temp4 S($E0) →a1$01E2 r$01E1 ??$01E0 ??$01DF...

14. X86-* Registers: More Registers → More Freedom For Programmer/Compiler 15 8 AL 7 031 16 AH AX EAX 15 87 031 16 EBX 15 87 031 16 ECX 15 87 031 16 EDX 31 0 ESI 31 0 EDI 31 0 EBP x86 (IA-32)

15. x86: OP target, source MOV target, source → target := source OP target, source → target := target OP source

16. x86: OP target, source LD? #$xx LD? $xxxx LD? $xxxx,? ST? $xxxx ST? $xxxx,X T?? MOV r, imm MOV r, [addr] MOV r2, [r1 + addr] MOV [addr], r MOV [r1 + addr], r2 MOV r2, r1 PUSH r POP r ADD r, reg/imm/addr ADC r, reg/imm/addr SUB r, reg/imm/addr SBB r, reg/imm/addr IMUL r, reg/imm/addr IDIV r, reg/imm/addr OR r, reg/imm/addr AND r, reg/imm/addr XOR r, reg/imm/addr NOT r SHR reg/addr, imm/CL SAR reg/addr, imm/CL SHL reg/addr, imm/CL r := r + reg/imm/addr EFlags.Carry := result.32 r := r + reg/imm/addr + EFlags.Carry EFlags.Carry := result.32 Most complex x86 addressing mode: [r1 + (r2 * scale) + imm] scale = immediate value: 1, 2, 4, 8 MOV target, source → target := source OP target, source → target := target OP source

17. x86: Flags LD? #$xx LD? $xxxx LD? $xxxx,? ST? $xxxx ST? $xxxx,X T?? MOV r, imm MOV r, [addr] MOV r2, [r1 + addr] MOV [addr], r MOV [r1 + addr], r2 MOV r2, r1 PUSH r POP r ADD r, reg/imm/addr ADC r, reg/imm/addr SUB r, reg/imm/addr SBB r, reg/imm/addr IMUL r, reg/imm/addr IDIV r, reg/imm/addr OR r, reg/imm/addr AND r, reg/imm/addr XOR r, reg/imm/addr NOT r SHR reg/addr, imm/CL SAR reg/addr, imm/CL SHL reg/addr, imm/CL CLC STC EFlags.Carry := 0 EFlags.Carry := 1 r := r + reg/imm/addr EFlags.Carry := result.32 r := r + reg/imm/addr + EFlags.Carry EFlags.Carry := result.32 EFlags.Sign := target.31 if target = 0 then EFlags.Zero := 1 else EFlags.Zero := 0; Most complex x86 addressing mode: [r1 + (r2 * scale) + imm] scale = immediate value: 1, 2, 4, 8

18. Same Example Targeting x86 Architecture x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; temp11 := b; temp11 := temp11 + c; push temp11 call F1 temp12 := returnValue; push 3 push 2 call F3 temp21 := returnValue; temp22 := d; temp22 := temp22 + e; temp22 := temp22 + temp21; push 4 call F4 temp23 := returnValue; temp24 := f; temp24 := temp24 + temp23; push temp24 push temp22 call F2 temp25 := returnValue; push 5 call F5 temp31 := returnValue; tempX := 1 tempX := tempX + a; temp4 := temp12; temp4 := temp4 * temp25; tempX := tempX + temp4; tempX := tempX + temp31; tempX := tempX + x; x := tempX;

19. x86 – With “Dynamic Temporary Variable Allocation” x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; MOV EAX, [&b] temp11 := b; ADD EAX, [&c] temp11 := temp11 + c; PUSH EAX push temp11 CALL &F1 call F1 ADD ESP, 4 PUSH EAXtemp12 := returnValue; PUSH 3 push 3 PUSH 2 push 2 CALL &F3 call F3 ADD ESP, 8 NOP temp21 := returnValue; MOV EBX, [&d] temp22 := d; ADD EBX, [&e] temp22 := temp22 + e; ADD EBX, EAX temp22 := temp22 + temp21; PUSH 4 push 4 CALL &F4 call F4 ADD ESP, 4 NOP temp23 := returnValue; MOV ECX, [&f] temp24 := f; ADD ECX, EAX temp24 := temp24 + temp23; PUSH ECX push temp24 PUSH EBX push temp22 CALL F2 call F2 ADD ESP, 8 PUSH EAXtemp25 := returnValue; PUSH 5 push 5 CALL &F5 call F5 ADD ESP, 4 NOPtemp31 := returnValue; MOV EBX, 1tempX := 1 ADD EBX, [&a]tempX := tempX + a; POP ECX assign ECX <- temp25 POP EDX temp4 := temp12; IMUL EDX, ECX temp4 := temp4 * temp25; ADD EBX, EDXtempX := tempX + temp4; ADD EBX, EAXtempX := tempX + temp31; ADD EBX, [&x]tempX := tempX + x; MOV [&x], EBXx := tempX;

20. x := 1 + a + F1(b + c) * F2(d + e + F3(2, 3), f + F4(4) + g) + F5(5) + x; SUB ESP, 8 MOV EAX, [&b] temp11 := b; ADD EAX, [&c] temp11 := temp11 + c; PUSH EAX push temp11 CALL &F1 call F1 ADD ESP, 4 MOV [ESP-4], EAXtemp12 := returnValue; PUSH 3 push 3 PUSH 2 push 2 CALL &F3 call F3 ADD ESP, 8 NOP temp21 := returnValue; MOV EBX, [&d] temp22 := d; ADD EBX, [&e] temp22 := temp22 + e; ADD EBX, EAX temp22 := temp22 + temp21; PUSH 4 push 4 CALL &F4 call F4 ADD ESP, 4 NOP temp23 := returnValue; MOV ECX, [&f] temp24 := f; ADD ECX, EAX temp24 := temp24 + temp23; PUSH ECX push temp24 PUSH EBX push temp22 CALL F2 call F2 ADD ESP, 8 MOV [ESP], EAXtemp25 := returnValue; PUSH 5 push 5 CALL &F5 call F5 ADD ESP, 4 NOPtemp31 := returnValue; MOV EBX, 1tempX := 1 ADD EBX, [&a]tempX := tempX + a; MOV EDX, [ESP-4] temp4 := temp12; IMUL EDX, [ESP] temp4 := temp4 * temp25; ADD EBX, EDXtempX := tempX + temp4; ADD EBX, EAXtempX := tempX + temp31; ADD EBX, [&x]tempX := tempX + x; MOV [&x], EBXx := tempX; ADD ESP, 8 x86 – “temporary variable preallocation”

21. Saving Contents of Registers as Part of a Calling Convention (Save in Prolog/Restore in Epilog): x86 Save EBP at Least, 6502 Save X at Least

22. Inline Assembler

23. Lazarus & Disassembler

24. CAKE and Inline Assembler

25. Kyan Pascal & Inline Assembler

26. Saving Stack State into EBP/X at Procedure Entry … ???

27. If Statement – Compile Pascal Commands To Instructions commandA1 if P then begin commandT1 commandT2 end else begin commandF1 commandF2 end; commandA2 instructionA1 if P then begin instructionT11 instructionT12 instructionT21 end else begin instructionF11 instructionF21 end; instructionA2

28. Conditional Instructions instructionA1 if P then instructionT11 if P then instructionT12 if P then instructionT21 if not(P) then instructionF11 if not(P) then instructionF21 instructionA2 instructionA1 if P then begin instructionT11 instructionT12 instructionT21 end else begin instructionF11 instructionF21 end; instructionA2 if P then instructionX ↓ if P then instructionX else NOP

29. Conditional Branch/Jump instructionA1 if P then instructionT11 if P then instructionT12 if P then instructionT21 if not(P) then instructionF11 if not(P) then instructionF21 instructionA2 instructionA1 if P then begin instructionT11 instructionT12 instructionT21 end else begin instructionF11 instructionF21 end; instructionA2 instructionA1 if not(P) then JMP elseBranch; instructionT11 instructionT12 instructionT21 JMP endIf; elseBranch: instructionF11 instructionF21 endIf: instructionA2 if P then instructionX ↓ if P then instructionX else NOP if P then JMP x ↓ if P then JMP x else NOP

30. Conditional Branch/Jump: x86 vs. 6502 x86 JZ addr(Jump if Zero)jump if EFlags.Zero = 1 JNZ addr(Jump if Not Zero)jump if EFlags.Zero = 0 JC addr(Jump if Carry)jump if EFlags.Carry = 1 JNC addr(Jump if Not Carry)jump if EFlags.Carry = 0 JS addr(Jump if Sign)jump if EFlags.Sign = 1 JNS addr(Jump if Not Sign)jump if EFlags.Sign = 0 JO addr(Jump if Overflow)jump if EFlags.Overflow = 1 JNO addr(Jump if Not Overfl.)jump if EFlags.Overflow = 0 6502 BEQ addr(Branch if Equal) BNE addr(Branch if Not Equal) BCS addr(Branch if Carry Set) BCC addr(Branch if Carry Clear) BMI addr(Branch if Minus) BPL addr(Branch if Plus) BVS addr (Branch if oVerflow Set) BVC addr(Branch if oVerflow Clear)

31. Simple Conditions instructionA1 if P = 0 then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 P; JNZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2

32. Simple Conditions instructionA1 if P = 0 then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 P; JNZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2 instructionA1 if a + b + c <> 0 then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 MOV EAX, [&a] ADD EAX, [&b] ADD EAX, [&c] JZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2

33. Getting Closer To Machine Code: Labels Become Target Addresses instructionA1 if P = 0 then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 P; JNZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2 instructionA1 if a + b + c <> 0 then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 $00001000: instructionA1 $00001004: MOV EAX, [&a] $00001009: ADD EAX, [&b] $0000100F: ADD EAX, [&c] $00001015: JZ 00001021h $00001017: instructionT1 $0000101B: instructionT2 $0000101F: JMP 00001029h $00001021: instructionF1 $00001025: instructionF2 $00001029: instructionA2 instructionA1 MOV EAX, [&a] ADD EAX, [&b] ADD EAX, [&c] JZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2

34. Combined Conditions instructionA1 if (a + b = 0) and (c + d = 0) then begin instructionT1 instructionT2 end; instructionA2 instructionA1 MOV EAX, [&a] ADD EAX, [&b] JNZ endIf MOV EAX, [&c] ADD EAX, [&d] JNZ endIf instructionT1 instructionT2 endIf: instructionA2 instructionA1 if (a + b = 0) or (c + d = 0) then begin instructionT1 instructionT2 end; instructionA2 instructionA1 MOV EAX, [&a] ADD EAX, [&b] JZ trueBranch MOV EAX, [&c] ADD EAX, [&d] JNZ endIf trueBranch: instructionT1 instructionT2 endIf: instructionA2

35. Complex Conditions? instructionA1 if A = B then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2

36. Complex Conditions Via Subtraction instructionA1 if A = B then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 if A – B = 0 then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2

37. Complex Conditions Via Subtraction instructionA1 if A = B then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 X := A - B; JNZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2 instructionA1 if A – B = 0 then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2

38. Complex Conditions Via Subtraction instructionA1 if A = B then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 X := A - B; JNZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2 instructionA1 if a + b = c + d then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 MOV EAX, [&a] ADD EAX, [&b] MOV EBX, [&c] ADD EBX, [&d] SUB EAX, EBX JNZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2 instructionA1 if A – B = 0 then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2

39. Non-destructive Subtraction = Compare instructionA1 if A = B then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 A - B; JNZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2 instructionA1 if a + b = c + d then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 MOV EAX, [&a] ADD EAX, [&b] MOV EBX, [&c] ADD EBX, [&d] CMP EAX, EBX JNZ elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2

40. Conditional Jump For More Than Equality x86 JZ addr(Jump if Zero)jump if EFlags.Zero = 1 JNZ addr(Jump if Not Zero)jump if EFlags.Zero = 0 JC addr(Jump if Carry)jump if EFlags.Carry = 1 JNC addr(Jump if Not Carry)jump if EFlags.Carry = 0 JS addr(Jump if Sign)jump if EFlags.Sign = 1 JNS addr(Jump if Not Sign)jump if EFlags.Sign = 0 jump if EFlags.Carry = 1 OR EFlags.Zero = 1 jump if EFlags.Carry = 0 AND EFlags.Zero = 0 alternative name in assembler (same opcode as on left) JE(Jump if Equal) JNE(Jump if Not Equal) JB(Jump if Below) unsigned JAE(Jump if Above or Equal) unsgn JBE(Jump if Below or Equal) unsgn JA(Jump if Above) unsigned JB = JNAE (Jump if Not Above or Equal) JAE = JNB (Jump if Not Below) JBE = JNA (Jump if Not Above) JA = JNBE (Jump if Not Below or Equal)

41. NOT(Below) → Above or Equal instructionA1 if a + b < c + d then begin instructionT1 instructionT2 end else begin instructionF1 instructionF2 end; instructionA2 instructionA1 MOV EAX, [&a] ADD EAX, [&b] MOV EBX, [&c] ADD EBX, [&d] CMP EAX, EBX JAE elseBranch instructionT1 instructionT2 JMP endIf elseBranch: instructionF1 instructionF2 endIf: instructionA2 x86 JZ addr(Jump if Zero)jump if EFlags.Zero = 1 JNZ addr(Jump if Not Zero)jump if EFlags.Zero = 0 JC addr(Jump if Carry)jump if EFlags.Carry = 1 JNC addr(Jump if Not Carry)jump if EFlags.Carry = 0 JS addr(Jump if Sign)jump if EFlags.Sign = 1 JNS addr(Jump if Not Sign)jump if EFlags.Sign = 0 jump if EFlags.Carry = 1 OR EFlags.Zero = 1 jump if EFlags.Carry = 0 AND EFlags.Zero = 0 alternative name in assembler (same opcode as on left) JE(Jump if Equal) JNE(Jump if Not Equal) JB(Jump if Below) unsigned JAE(Jump if Above or Equal) unsgn JBE(Jump if Below or Equal) unsgn JA(Jump if Above) unsigned

42. While & Repeat Cycles instructionA1 while A = B do begin instructionC1 instructionC2 end; instructionA2 instructionA1 loop: A - B; JNZ endWhile instructionC1 instructionC2 JMP loop endWhile: instructionA2 instructionA1 repeat instructionC1 instructionC2 until A = B; instructionA2 instructionA1 loop: instructionC1 instructionC2 B - A; JNZ loop instructionA2

43. For Cycle → While Cycle instructionA1 for x := A to B do begin instructionC1 instructionC2 end; instructionA2 instructionA1 x := A; while x <= B do begin instructionC1 instructionC2 x := x + 1; end; instructionA2

44. EASMD